• Proceedings of the IEEK Conference
• /
• 2008.06a
• /
• pp.24-25
• /
• 2008

An Electrostatic discharge (ESD) protection has been a very important reliability issue in microelectronics, especially for RF (Radio Frequency) integrated circuits (ICs). This paper reviews design and analysis of on-chip ESD (electrostatic discharge) protection circuits for RF applications. Key issues in RF ESD protection, design methods, and RF ESD protection solutions are discussed.

• Journal of Information Display
• /
• v.5 no.4
• /
• pp.1-6
• /
• 2004

In this paper, we investigate on the characteristics of poly-Si TFTs reuired for the implementation of analog circuits to be integrated with System-on-Glass (SoG). Matching requirements in terms of resistor values, threshold voltage and mobility of poly-Si TFTs are derived as a function of the resolution of display system. Effective mobility of poly-Si TFTs required for the realization of source driver is analyzed for various panel sizes.

• Electronics and Telecommunications Trends
• /
• v.33 no.6
• /
• pp.1-11
• /
• 2018

Several industrial applications such as space exploration, aerospace, automotive, the downhole oil and gas industry, and geothermal power plants require specific electronic systems under extremely high temperatures. For the majority of such applications, silicon-based technologies (bulk silicon, silicon-on-insulator) are limited by their maximum operating temperature. Silicon carbide (SiC) has been recognized as one of the prime candidates for providing the desired semiconductor in extremely high-temperature applications. In addition, it has become particularly interesting owing to a Si-compatible process technology for dedicated devices and integrated circuits. This paper briefly introduces a variety of SiC-based integrated circuits for use under extremely high temperatures and covers the technology trend of SiC CMOS devices and processes including the useful implementation of SiC ICs.

• Journal of Semiconductor Engineering
• /
• v.1 no.3
• /
• pp.81-87
• /
• 2020

An instrumentation amplifier (IA) and an analog-to-digital converter (ADC) are essential circuit blocks for accurate and robust sensor readout systems. This paper introduces recent advances in radiation-hardening by design (RHBD) techniques applied for the sensor readout integrated circuits (IC), e.g., the three-op-amp IA and the successive-approximation register (SAR) ADC, operating against total ionizing dose (TID) and singe event effect (SEE) in harsh radiation environments. The radiation-hardened IA utilized TID monitoring and adaptive reference control to compensate for transistor parameter variations due to radiation effects. The radiation-hardened SAR ADC adopts delay-based double-feedback flip-flops to prevent soft errors which flips the data bits. Radiation-hardened IA and ADC were verified through compact model simulation, and fabricated CMOS chips were measured in radiation facilities to confirm their radiation tolerance.

• Journal of Sensor Science and Technology
• /
• v.5 no.5
• /
• pp.63-68
• /
• 1996

In order to implement the integrated capacitive pressure sensors, which contains integrated interface circuits to detect the electrical output signal, several main factors that have a bad effect on the characteristics of sensors must be improved, such as parasitic capacitance effects, temperature/thermal drift, and the leakage current of a readout circuitry. This paper describes the novel design of the dedicated CMOS readout circuitry that is consists of two capacitance to frequency converters and 4 bit digital logic compensating circuits. Dividing the oscillation frequency of a sensing sensor by that of reference sensor, this circuit is designed to eliminate the thermal/temperature drift and the effect of the leakage currents, and to access a digital signals to obtain a high signal-to-noise(S/N)ratio. Therefore, the resolution of this circuit can be increased by increasing the number of the digital bits. Digital compensated circuits of this circuits, except for the C-F converters, are fabricated on a FPGA chip, and fundamental performance of the circuits are evaluated.

• Proceedings of the IEEK Conference
• /
• 2000.11c
• /
• pp.149-152
• /
• 2000

We propose simple analog MOS circuits producing the one-dimensional compact motion-sensing circuits. In the proposed circuit, the optical flow is computed by a number of local motion sensors which are based on biological motion detectors. Mimicking the structure of biological motion detectors made the circuit structure quite simple, compared with conventional velocity sensing circuits. Extensive simulation results by a simulation program of integrated circuit emphasis (SPICE) indicated that the proposed circuits could compute local velocities of a moving light spot and showed direction selectivity for the moving spot

• Progress in Superconductivity
• /
• v.3 no.1
• /
• pp.17-22
• /
• 2001

Practical implementation of the SFQ technology in most application requires more than single-chip-level circuit complexity. Multiple chips have to be integrated with a technology that is reliable at cryogenic temperatures and supports an inter-chip data transmission speed of tens of GHz. In this work, we have studied two basic issues in building large RSFQ circuits. The first is the reliable inter-chip SFQ pulse transfer technique using Multi-Chip-Module (MCM) technology. By noting that the energy contained in an SFQ pulse is less than an attojoule, it is not very surprising that the direct transmission of a single SFQ pulse through MCM solder bump connectors can be difficult and an innovative technique is needed. The second is the recycling of the bias currents. Since RSFQ circuits are dc current biased the large RSFQ circuits need serial biasing to reduce the total amount of current input to the circuit.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.6 no.1
• /
• pp.52-58
• /
• 2006

Single-electron transistor (SET)-based logic cells and SET/FET hybrid integrated circuits have been fabricated on SOI chips. The input-output voltage transfer characteristic of the SET-based complementary logic cell shows an inverting behavior where the output voltage gain is estimated to be about 1.2 at 4.2K. The SET/FET output driver, consisting of one SET and three FETs, yields a high voltage gain of 13 and power amplification with a wide-range output window for driving next circuit. Finally, the SET/FET literal gate for a multi-valued logic cell, comprising of an SET, an FET and a constant-current load, displays a periodic voltage output of high/low level multiple switching with a swing as high as 200mV. The multiple switching functionality of all the fabricated logic circuits could be enhanced by utilizing a side gate incorporated to each SET component to enable the phase control of Coulomb oscillations, which is one of the unique characteristics of the SET-based logic circuits.

• Journal of the Korean Society of Industry Convergence
• /
• v.21 no.6
• /
• pp.265-271
• /
• 2018

DC-DC buck converter is a critical building block in the power management integrated circuit (PMIC) architecture for the portable devices such as cellular phone, personal digital assistance (PDA) because of its power efficiency over a wide range of conversion ratio. To ensure a safe operation, avoid unexpected damages and enhance the reliability of the converter, fully-integrated protection circuits such as over voltage protection (OVP), under voltage lock out (UVLO), startup, and thermal shutdown (TSD) blocks are designed. In this paper, these three fully-integrated protection circuit blocks are proposed for use in the DC-DC buck converter. The buck converter with proposed protection blocks is operated with a switching frequency of 1 MHz in continuous conduction mode (CCM). In order to verify the proposed scheme, the buck converter has been designed using a 180 nm CMOS technology. The UVLO circuit is designed to track the input voltage and turns on/off the buck converter when the input voltage is higher/lower than 2.6 V, respectively. The OVP circuit blocks the buck converter's operation when the input voltage is over 3.3 V, thereby preventing the destruction of the devices inside the controller IC. The TSD circuit shuts down the converter's operation when the temperature is over $85^{\circ}C$. In order to verify the proposed scheme, these protection circuits were firstly verified through the simulation in SPICE. The proposed protection circuits were then fabricated and the measured results showed a good matching with the simulation results.

• Proceedings of the KIEE Conference
• /
• 2009.07a
• /
• pp.347_348
• /
• 2009

In this paper, we described the integrated monitoring system for low-voltage panel boards. This system consists of three parts, a panel board controller, an integrated monitoring unit and a remote PC. The panel board controller which was made of CT/PT unit, control unit and power supply is able to transmit variable parameter for monitoring and diagnosis of low voltage branch circuits. Also, the integrated monitoring unit was collected monitoring data from panel boards and displayed on the touch panel.