• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.464-466
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• 2019

Controllers used in nuclear power plants require high reliability. A controller including a Field Programmable Gate Array (FPGA) and a Complex Programmable Logic Device (referred to hereinafter as FPGA) has been applied to many Nuclear Power Plants (NPP) in the past, including the APR1400 (Advanced Power Reactor 1400), a Korean digital nuclear power plant. Initially, the FPGA was considered as a general IC (Integrated Circuit) and verified only by device verification and performance testing. In the 1990s, research on FPGA verification began, and until the FPGA became a chip, it was regarded as software and the software Verification and Validation (V&V) using IEEE 1012-2004 was implemented. Currently, IEC 62566, which is a European standard, has been applied for a lot of verification. This method has been evaluated as the most sensible method to date. This is because the method of verifying the characteristics of SoC (System on Chip), which has been a problem in the existing verification method, is sufficiently applied. However, IEC 62566 is a European standard that has not yet been adopted in the United States and maintains the application of IEEE 1012 for FPGA. IEEE 1012-2004 or IEC 62566 is a technical standard. In practice, various methods are applied to meet technical standards. In this paper, we describe the procedure and important points of verification method of Nuclear Safety Class FPGA applying SoC verification method.

• Journal of IKEEE
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• v.12 no.3
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• pp.176-183
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• 2008

The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device is proposed in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. DTMOS with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an error amplifier and a comparator circuit as a block. The Saw-tooth generator is made to have 1.2 MHz oscillation frequency and full range of output swing from ground to supply voltage(VDD:3.3V). The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device, achieved the high efficiency near 95% at 100mA output current. And DC-DC converter is designed with LDO in stand-by mode which fewer than 1mA for high efficiency.

• Journal of the Microelectronics and Packaging Society
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• v.23 no.2
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• pp.73-78
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• 2016

An increase in the transistor density of integrated circuit devices leads to a very high increase in heat dissipation density, which causes a long-term reliability and various thermal problems in microelectronics. In this study, liquid cooling method was investigated using straight microchannels with various metal bumps. Microchannels were fabricated on Si wafer using deep reactive ion etching (DRIE), and Ag, Cu, or Cr/Au/Cu metal bumps were placed on Si wafer by a screen printing method. The surface temperature of liquid cooling structures with various metal bumps was measured by infrared (IR) microscopy. For liquid cooling with Cr/Au/Cu bumps, the surface temperature difference before and after liquid cooling was $45.2^{\circ}C$ and the power density drop was $2.8W/cm^2$ at $200^{\circ}C$ heating temperature.

• Transactions on Electrical and Electronic Materials
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• v.17 no.5
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• pp.280-288
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• 2016

Microelectronic product consumers may already be expecting another paradigm shift with smarter phones over smart phones, but the current status of microelectronic manufacturing engineering education (MMEE) in universities hardly makes up the pace for such a fast moving technology paradigm shift. The purpose of MMEE is to educate four-year university graduates to work in the microelectronics industry with up-to-date knowledge and self-motivation. In this paper, we present a comprehensive curriculum for a four-year university degree program in the area of microelectronics manufacturing. Three hands-on experienced-based courses are proposed, along with a methodology for undergraduate students to acquire hands-on experience, towards integrated circuits (ICs) design, fabrication and packaging, are presented in consideration of manufacturing engineering education. Semiconductor device and circuit design course for junior level is designed to cover how designed circuits progress to micro-fabrication by practicing full customization of the layout of digital circuits. Hands-on experienced-based semiconductor fabrication courses are composed to enhance students’ motivation to participate in self-motivated semiconductor fab activities by performing a series of collaborations. Finally, the Microelectronics Packaging course provides greater possibilities of mastered skillsets in the area of microelectronics manufacturing with the fabrication of printed circuit boards (PCBs) and board level assembly for microprocessor applications. The evaluation of the presented comprehensive curriculum was performed with a students’ survey. All the students responded with “Strongly Agree” or “Agree” for the manufacturing related courses. Through the development and application of the presented curriculum for the past six years, we are convinced that students’ confidence in obtaining their desired jobs or choosing higher degrees in the area of microelectronics manufacturing was increased. We confirmed that the hypothesis on the inclusion of handson experience-based courses for MMEE is beneficial to enhancing the motivation for learning.

• The Journal of the Korea Contents Association
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• v.7 no.1
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• pp.116-123
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• 2007

This paper proposed a new amplitude width modulation for OLED data driver IC. The data driver controls brightness of OLED by adjusting amplitude and width of the data drive current pulse. There were two conventional methods; pulse amplitude modulation(PAM) and pulse width modulation(PWM). The PWM method suffered from lower light emitting time efficiency at low luminance signal. The PAM method suffered from large chip area using DACs for each column. The proposed method was aiming at accurately controlling of the current level by MSB data and light emitting efficiency by LSB data to improve the inefficiencies of the PAM and a PWM. The proposed AWM driver circuit implemented using $0.35-{\mu}m$ 3-poly 4-metal CMOS high voltage process. The simulation result shows the improvement in the accuracy of the gray level control even though the driver circuit is smaller than the PAM.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.1
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• pp.59-67
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• 2007

This paper presents a low power dual-level low voltage differential signaling (DLVDS) technique using current source switching for LCD driver ICs in portable products. The transmitter makes dual level signal that has two different level signal 400mVpp and 250mVpp while keeping the advantages of LVDS. The decoding circuit recovers the primary signal from DLVDS. The low power DLVDS is implemented using a $0.25{\mu}m$ CMOS process under 2.5V supply. The proposed circuit shows 800Mbps/2-line data rate and 9mW, 11.5mW power consumptions in transmitter and receiver, respectively. The proposed DLVDS scheme reduce power consumption dramatically compare with conventional one.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.768-771
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• 2003

The impulse between launch vehicle and atmosphere can generate a lot of noise and vibration during the process of launching a satellite. Structurally, electronic equipment (KOMPSAT 2, RDU : Remote Drive Unit) of a satellite consists of aluminum case containing PCB (Printed circuit boards). Each PCB has resistors and IC (Integrated circuits). Noise and vibration of wide frequency band are transferred to the inside of fairing, subsequently creating vibration of the electronic equipment of the satellite. In this situation. random vibration can cause malfunctioning of the electronic equipment of the device. Furthermore, when tile frequency of random vibration meets with natural frequency of PCB. fatigue fracture nay occur in the part of solder joint. The launching environment, thus. needs to be carefully considered when designing the electronic equipment of a satellite. In general. the safety of the electronic equipment is supposed to be related to the natural frequency, shapes of mode and dynamic deflection of PCB in the electronic equipment. Structural vibration analysis of PCB and its electronic components can be performed using either FEM(Finite Element Method) or vibration test. In this study. the natural frequency and dynamic deflection of PCB are measured by FEM, aud the safety of the electronic components of PCB is being evaluated according to the results. This study presents a unique method for finite element modeling and analysis of PCB and its electronic components. The results of FEA are verified by vibration test. The method proposed herein may be applicable to various designs from the electronic equipments of a satellite to home electronics.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.3
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• pp.59-66
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• 2015

In this paper, we propose a method of improving the light-load efficiency of DC-DC buck converter using 4bit SAR-ADC (Successive Approximation ADC) for a LDO or a power transistor size selection technique. The proposed circuit selects power transistor sizes depending on load current so that improves the light-load efficiency of the DC-DC buck converter. For this, we select the power transistor size with a cross point of the switching loss and the conduction loss. Also, when the IC operates in standby mode or sleep mode, a LDO mode is selected for improving the efficiency. The proposed circuit selects power transistor sizes(X1, X2, X4, X8) with 4 bits and its efficiency is higher about the maximum of 25% at the light-load than that of a single transistor size. Input voltage and output voltage are 5V and 3.3V for maximum load currents of 500mA.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.10
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• pp.53-60
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• 2009

Due to increased integration density and reduced threshold voltages, leakage current reduction becomes important in the semiconductor IC design for low power consumption. In a combinational logic circuit, the leakage current in the standby state depends on the values of the input. In this research, we developed a new input vector control method to minimize the leakage power. A new efficient algorithm is developed to find the minimal leakage vector. It can reduce the leakage current by 15.7% from the average leakage current and by 6.7% from the results of simulated evolution method during standby or idle states for a set of benchmark circuits. The minimal leakage input vector, with idle input signal, can also reduce the leakage current by 6.8% from the average leakage current and by 3.2% from the results of simulated evolution method for sequential circuits.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.1
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• pp.92-98
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• 2014

In this paper, the reconfigurable frequency selective surface for C-band was designed using patch array and grid structure. Frequency reconfigurability was obtained by varying the capacitance from varactor diode. From the optimized design parameters, we fabricated the reconfigurable frequency selective surface using the FPCB(Flexible Printed Circuit Board) and commercial varactor diode and measured the frequency reconfigurability for different bias voltage. From the measurement results, proposed structure has the wideband operating frequency of 6.6~7.6 GHz. We can applied this proposed structure to the smooth curved surface like as radome of aircraft or warship.