Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Low Power Dual-Level LVDS Technique using Current Source Switching

전류원 스위칭에 의한 저전력 듀얼레벨 차동신호 전송(DLVDS) 기법

  • Kim, Ki-Sun (Dept. of Computer and Communication Engineering and Research Institute for Computer and Information Communication, Chungbuk National University) ;
  • Kim, Doo-Hwan (Dept. of Computer and Communication Engineering and Research Institute for Computer and Information Communication, Chungbuk National University) ;
  • Cho, Kyoung-Rok (Dept. of Computer and Communication Engineering and Research Institute for Computer and Information Communication, Chungbuk National University)
  • 김기선 (충북대학교 정보통신공학과 컴퓨터정보통신연구소) ;
  • 김두환 (충북대학교 정보통신공학과 컴퓨터정보통신연구소) ;
  • 조경록 (충북대학교 정보통신공학과 컴퓨터정보통신연구소)
  • Published : 2007.01.25
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Abstract

This paper presents a low power dual-level low voltage differential signaling (DLVDS) technique using current source switching for LCD driver ICs in portable products. The transmitter makes dual level signal that has two different level signal 400mVpp and 250mVpp while keeping the advantages of LVDS. The decoding circuit recovers the primary signal from DLVDS. The low power DLVDS is implemented using a $0.25{\mu}m$ CMOS process under 2.5V supply. The proposed circuit shows 800Mbps/2-line data rate and 9mW, 11.5mW power consumptions in transmitter and receiver, respectively. The proposed DLVDS scheme reduce power consumption dramatically compare with conventional one.

본 논문은 배터리를 사용하는 휴대 기기용 LCD driver IC를 위한 전류원 스위칭에 의한 저전력 듀얼레벨 저전압 차동신호 전송(DLVDS) 회로를 제안한다. 제안된 송신기는 기존의 DLVDS 회로의 송신기의 신호생성 방법을 개선하여 기존의 전송선 감소의 장점을 유지하면서 전력소모를 현저히 감소시켰다. 또한 개선된 신호생성 방법의 개선으로 인하여 디코딩이 변경되어 수신기 회로가 더 간단해졌다. 제안된 회로는 2.5V의 전원을 갖는 $0.25{\mu}m$ CMOS 공정으로 설계 되었다. 제안된 회로의 시뮬레이션 결과는 800Mbps/2-line의 전송률, 송신기는 9mW, 수신기는 11.5mW의 전력소모를 나타내었으며, 기존의 DLVDS와 비교하여 약60% 전력소모가 감소했다.

Keywords

References

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