• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.345-348
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• 2000

In this paper, We described the procedures to generate an input-output buffer information specification (IBIS) model in digital IC circuits. We gives the method to describe IBIS standard I/O for the characteristics of I/O buffer and to represent its electrical characteristics. The parameters of I/O structure for I/O buffer modelling are also referred, and an IBIS model for CMOS, TTL IC, ROM and RAM constructed amounts about 216. This IBIS model can be used to the simulation of signal integrity of high speed circuits in a PCB level.

• Journal of the Korea Institute of Military Science and Technology
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• v.5 no.2
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• pp.103-115
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• 2002

This paper describes the results on the design and implementation of large capacity cable checking system using I/O buffer method. The I/O buffer module which has feedback loops with input and output buffers is designed with logic gate in the VME board and controlled by MPC860 microprocessor. So this system can check a lot of cable at the same time with less size and less processing time than that of relay matrix method with the A/D converter. The size of the I/O buffer module can be variable according to the number of cable. And any type of cable can be checked even if the pin assignment of cable is changed.

• Journal of KIISE
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• v.43 no.11
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• pp.1216-1222
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• 2016

The advent of large-scale web services has resulted in gradual increase in the amount of data used in those services. These big data are managed efficiently by DBMS such as MySQL and MariaDB, which use InnoDB engine as their storage engine, since InnoDB guarantees ACID and is suitable for handling large-scale data. To improve I/O performance, InnoDB caches data and index of its database through a buffer pool. It also supports multiple buffer pools to mitigate lock contentions. However, the multiple buffer pool scheme leads to the additional data consistency overhead. In this paper, we analyze the overhead of the multiple buffer pool scheme. In our experimental results, although multiple buffer pool scheme mitigates the lock contention by up to 46.3%, throughput of DMBS is significantly degraded by up to 50.6% due to increased disk I/O and fsync calls.

• Journal of the Korean Vacuum Society
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• v.20 no.1
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• pp.50-56
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• 2011

In this study, the effects of ZnO buffer layer thickness and annealing temperature on the heterojunction diode, ZnO/b-ZnO/p-Si(111), were reported. The effects of those on the structural and electrical properties of zinc oxide (ZnO) films on ZnO buffered p-Si (111) substrate were also studied. Structural properties of ZnO thin films were studied by X-ray diffraction and I-V characteristics were measured by a semiconductor parameter analyzer. ZnO thin films with 70 nm thick buffer layer and annealing temperature of $700^{\circ}C$ showed the best c-axis preferred orientation. The best electrical property was found at the condition of buffer layer annealing temperature of $700^{\circ}C$ and 50nm thick ZnO buffer layer (resistivity: $2.58{\times}10^{-4}[{\Omega}-cm]$, carrier concentration: $1.16{\times}1020[cm^{-3}]$). The I-V characteristics for ZnO/b-ZnO/p-Si(111) heterojunction diode were improved with increasing buffer layer thickness at buffer layer annealing temperature of $700^{\circ}C$.

• Proceedings of the IEEK Conference
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• 2002.06e
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• pp.243-246
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• 2002

This paper presents a study on the design and implementation of modulized I/O buffer control system for large capacity cable check. A 8bit I/O buffer basic module which has feedback loops with input and output buffers is simulated in PSpice and implemented with logic gates. This system is composed of 18 sub-boards which have 3 channels of 32bit data buses, and of a main board with MPC860 microprocessor.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.7
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• pp.45-51
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• 2019

Modern file systems have journaling mechanism to maintain their stored state consistently even under unexpected system crashes or disasters. However, the journaling makes I/O throughput lower. This performance degradation comes from the ordering mechanism between the data buffer and metadata buffer and two-staged buffer writing. Especially, if the data buffer and metadata buffer are journalled at the same time, then it incurs significant performance degradation due to the two-staged writing. That shows the trade-off relation-ship between I/O performance and system reliability. In this paper, we propose RFJ: a reliable and fast jour-naling mechanism to deal with this trade-off relationship. We propose an ordering enforced writeback journaling mode and selective journaling mechanism. The Ordering enforced writeback journaling mode achieves low I/O latency and the selective journaling mechanism achieves high reliability. The experimental result shows that the performance of RFJ is almost 5x faster than the journal mode of Ext3 file system but it still supports the same reliability with the journal mode.

• Korean Journal of Materials Research
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• v.21 no.1
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• pp.34-38
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• 2011

In this study, the effects of an annealed buffer layer with different thickness on heterojunction diodes based on the ZnO/ZnO/p-Si(111) systems were reported. The effects of an annealed buffer layer with different thickness on the structural, optical, and electrical properties of zinc oxide (ZnO) films on p-Si(111) were also studied. Before zinc oxide (ZnO) deposition, different thicknesses of ZnO buffer layer, 10 nm, 30 nm, 50 nm and 70 nm, were grown on p-Si(111) substrates using a radio-frequency sputtering system; samples were subsequently annealed at $700^{\circ}C$ for 10 minutes in $N_2$ in a horizontal thermal furnace. Zinc oxide (ZnO) films with a width of 280nm were also deposited using a radio-frequency sputtering system on the annealed ZnO/p-Si (111) substrates at room temperature; samples were subsequently annealed at $700^{\circ}C$ for 30 minutes in $N_2$. In this experiment, the structural and optical properties of ZnO thin films were studied by XRD (X-ray diffraction), and room temperature PL (photoluminescence) measurements, respectively. Current-voltage (I-V) characteristics were measured with a semiconductor parameter analyzer. The thermal tensile stress was found to decrease with increasing buffer layer thickness. Among the ZnO/ZnO/p-Si(111) diodes fabricated in this study, the sample that was formed with the condition of a 50 nm thick ZnO buffer layer showed a strong c-axis preferred orientation and I-V characteristics suitable for a heterojunction diode.

• Mass Spectrometry Letters
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• v.6 no.4
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• pp.112-115
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• 2015

In this article, we examine the influences of Ne and He buffer gases under confined Ar⁺ ion cloud in a homemade Paul ion trap in various pressures and confinement times. The trap is of small size (r₀ = 1 cm) operating in a radio frequency (rf) voltage only mode, and has limited accuracy of 13 V. The electron impact and ionization process take place inside the trap and a Faraday cup has been used for the detection. Although the experimental results show that the Ar⁺ ion FWHM with Ne buffer gas is wider than the He buffer gas at the same pressure (1×10^-1 mbar) and confinement time is about 1000 μs, nevertheless, a faster cooling was found with He buffer gas with 500 μs. ultimetly, the obtanied results performed an average cloud tempertures reduced from 1777 K to 448.3 K for Ne (1000 μs) and from 1787.9 K to 469.4 K for He (500 μs)

• ETRI Journal
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• v.25 no.5
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• pp.297-304
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• 2003

A multimedia SoC often requires a large internal buffer, because it must store the whole search window to reduce the huge I/O bandwidth of motion estimation. However, the silicon area of the internal buffer increases tremendously as the search range becomes larger. This paper proposes a new method that greatly reduces the internal buffer size of a multimedia SoC while the computational cost, I/O bandwidth, and image quality do not change. In the proposed method, only the overlapped parts of search windows for consecutive macroblocks are stored in the internal buffer. The proposed method reduces the internal buffer. The proposed method reduces the internal buffer size to 1/5.0 and 1/8.8 when the search range is ${\pm}64{\times}{\pm}$64 and ${\pm}128{\times}{\pm}$128, respectively.

• Proceedings of the KIEE Conference
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• 1994.07b
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• pp.1277-1279
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• 1994

In the structure of ZnO/nip-SiC: H/metal substrate amorphous silicon (a-Si:H) solar cells, the effects of inserting a rear textured ZnO in the p-SiC:H/metal interface and a graded bandgap buffer layer in the i/p-SiC:H have been analysed by computer simulation. The incident light was taken to have an intensity of $100mW/cm^2$(AM-1). The thickness of the a-Si:H n, ${\delta}$-doped a-SiC:H p, and buffer layers was assumed to be $200{\AA},\;66{\AA}$, and $80{\AA}$, respectively. The scattering coefficients of the front and back ZnO were taken to be 0.2 and 0.7, respectively. Inserting the rear buffer layer significantly increases the open circuit voltage($V_{oc}$) due to reduction of the i/p interface recombination rate. The use of textured ZnO markedly improves collection efficiency in the long wavelengths( above ${\sim}550nm$ ) by back scattering and light confinement effects, resulting in dramatic enhancement of the short circuit current density($J_{sc}$). By using the rear buffer and textured ZnO, the i-layer thickness of the ceil for obtaining the maximum efficiency becomes thinner(${\sim}2500{\AA}$). From these results, it is concluded that the use of textured ZnO and buffer layer at the backside of the ceil is very effective for enhancing the conversion efficiency and reducing the degradation of a-Si:H pin-type solar cells.