• Title/Summary/Keyword: High-resistive silicon

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Variation in IR Absorption Characteristics of a Bolometer by Resistive Hole-array Patterns (저항성 홀배열이 적용된 볼로미터의 적외선 흡수 특성 변화)

  • Kim, Tae Hyun;Oh, Jaesub;Park, Jongcheol;Kim, Hee Yeoun;Lee, Jong-Kwon
    • Journal of Sensor Science and Technology
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    • v.27 no.5
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    • pp.306-310
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    • 2018
  • In order to develop a highly sensitive infrared sensor, it is necessary to develop techniques for decreasing the rate of heat absorption and the transition of the absorption wavelength to a longer wavelength, both of which can be induced by decreasing the pixel size of the bolometer. Therefore, in this study, $1{\mu}m$ hole-arrays with a subwavelength smaller than the incident infrared wavelength were formed on the amorphous silicon-based microbolometer pixels in the absorber, which consisted of a TiN absorption layer, an a-Si resistance layer and a SiNx membrane support layer. We demonstrated that it is possible to reduce the thermal time constant by 16% relative to the hole-patternless bolometer, and that it is possible to shift the absorption peak to a shorter wavelength as well as increase absorption in the $4-8{\mu}m$ band to compensate for the infrared long-wavelength transition. These results demonstrate the potential for a new approach to improve the performance of high-resolution microbolometers.

Advanced Silicon Solar Cell Structures for Space Applications

  • Lee, S.H.;Kim, D.S.
    • Solar Energy
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    • v.17 no.2
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    • pp.23-33
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    • 1997
  • This paper reviews the advanced solar cell structures used in space. These are the structures which incorporate the back surface field and reflectors with very shallow and lightly doped emitters. Their use in space has shown that the thinner cells are more resistive to radiation damage than the thicker ones. It has been found that the charged particles affect both the surface and bulk of the cells used in space. This causes degradation in the output power, which in effect, can be explained by the degrading diffusion length of the cells. The PERL cells showed higher BOL(beginning of life) efficiency and almost the same EOL(end of life) efficiency as structures with wrap-around contact configuration fabricated on 10 ${\Omega}cm$ resistivity substrates. This observation lead to a conclusion that, the space cells do not necessarily need to have very high BOL efficiency except in specific missions which require such.

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Optimized design of the chip inductor and characteristic analysis for RF IC's (마이크로파용 칩 인덕터의 최적화 설계 및 특성분석)

  • Lee, C.K.;Kim, Y.S.;Kim, H.S.
    • Proceedings of the KIEE Conference
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    • 2000.07c
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    • pp.1776-1778
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    • 2000
  • The demands placed on portable wireless communication equipment include low cost, low supply voltage, low power, dissipation, low noise, high frequency of operation, and low distortion. These design requirements cannot be met satisfactorily in many cases without the use of RF inductors. However, implementing the inductor on-chip has been regarded as an impractical task because of excessive substrate capacitance and substantial resistive losses due to metallization and the conductive silicon substrate. Hence, there is a great incentive to design, optimize, and model spiral inductors on Si substrate. So, we analyzed a chip inductors using electromagnetic analysis and established a set of design rules for rectangular spiral inductors.

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Characteristics of a 10kVA three phase superconducting power transformer (3상 10kVA 고온초전도 변압기의 특성)

  • Lee, S.W.;Lee, H.J.;Cha, G.S.;Lee, J.K.;Ryu, K.W.;Hahn, S.Y.
    • Proceedings of the KIEE Conference
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    • 2001.10a
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    • pp.24-26
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    • 2001
  • The high temperature super-conductor transformer gains interests from the industries. This paper described construction and test results of a 10kVA HTS transformer. Three phase transformer with double pancake windings were constructed. BSCCO-2223 wire, silicon sheet steel core and FRP cryostats were used in that transformer After the test of basic properties of the 3 phase HTS transformer using no load test, short ciucuit test and full load test, continuous operation of 100 hours with pure resistive load has been carried out. Test proved over-load capability and reliability of the HTS transformer.

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Si-Containing Nanostructures for Energy-Storage, Sub-10 nm Lithography, and Nonvolatile Memory Applications

  • Jeong, Yeon-Sik
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.108-109
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    • 2012
  • This talk will begin with the demonstration of facile synthesis of silicon nanostructures using the magnesiothermic reduction on silica nanostructures prepared via self-assembly, which will be followed by the characterization results of their performance for energy storage. This talk will also report the fabrication and characterization of highly porous, stretchable, and conductive polymer nanocomposites embedded with carbon nanotubes (CNTs) for application in flexible lithium-ion batteries. It will be presented that the porous CNT-embedded PDMS nanocomposites are capable of good electrochemical performance with mechanical flexibility, suggesting these nanocomposites could be outstanding anode candidates for use in flexible lithium-ion batteries. Directed self-assembly (DSA) of block copolymers (BCPs) can generate uniform and periodic patterns within guiding templates, and has been one of the promising nanofabrication methodologies for resolving the resolution limit of optical lithography. BCP self-assembly processing is scalable and of low cost, and is well-suited for integration with existing semiconductor manufacturing techniques. This talk will introduce recent research results (of my research group) on the self-assembly of Si-containing block copolymers for the achievement of sub-10 nm resolution, fast pattern generation, transfer-printing capability onto nonplanar substrates, and device applications for nonvolatile memories. An extraordinarily facile nanofabrication approach that enables sub-10 nm resolutions through the synergic combination of nanotransfer printing (nTP) and DSA of block copolymers is also introduced. This simple printing method can be applied on oxides, metals, polymers, and non-planar substrates without pretreatments. This talk will also report the direct formation of ordered memristor nanostructures on metal and graphene electrodes by the self-assembly of Si-containing BCPs. This approach offers a practical pathway to fabricate high-density resistive memory devices without using high-cost lithography and pattern-transfer processes. Finally, this talk will present a novel approach that can relieve the power consumption issue of phase-change memories by incorporating a thin $SiO_x$ layer formed by BCP self-assembly, which locally blocks the contact between a heater electrode and a phase-change material and reduces the phase-change volume. The writing current decreases by 5 times (corresponding to a power reduction of 1/20) as the occupying area fraction of $SiO_x$ nanostructures varies.

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Memristors based on Al2O3/HfOx for Switching Layer Using Single-Walled Carbon Nanotubes (단일 벽 탄소 나노 튜브를 이용한 스위칭 레이어 Al2O3/HfOx 기반의 멤리스터)

  • DongJun, Jang;Min-Woo, Kwon
    • Journal of IKEEE
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    • v.26 no.4
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    • pp.633-638
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    • 2022
  • Rencently, neuromorphic systems of spiking neural networks (SNNs) that imitate the human brain have attracted attention. Neuromorphic technology has the advantage of high speed and low power consumption in cognitive applications and processing. Resistive random-access memory (RRAM) for SNNs are the most efficient structure for parallel calculation and perform the gradual switching operation of spike-timing-dependent plasticity (STDP). RRAM as synaptic device operation has low-power processing and expresses various memory states. However, the integration of RRAM device causes high switching voltage and current, resulting in high power consumption. To reduce the operation voltage of the RRAM, it is important to develop new materials of the switching layer and metal electrode. This study suggested a optimized new structure that is the Metal/Al2O3/HfOx/SWCNTs/N+silicon (MOCS) with single-walled carbon nanotubes (SWCNTs), which have excellent electrical and mechanical properties in order to lower the switching voltage. Therefore, we show an improvement in the gradual switching behavior and low-power I/V curve of SWCNTs-based memristors.

UV Responsive Characteristics of n-Channel Schottky Barrier MOSFET with ITO as Source/Drain Contacts

  • Kim, Tae-Hyeon;Lee, Chang-Ju;Kim, Dong-Seok;Sung, Sang-Yun;Heo, Young-Woo;Lee, Jung-Hee;Hahm, Sung-Ho
    • Journal of Sensor Science and Technology
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    • v.20 no.3
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    • pp.156-161
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    • 2011
  • We fabricated a schottky barrier metal oxide semiconductor field effect transistor(SB-MOSFET) by applying indium-tin-oxide(ITO) to the source/drain on a highly resistive GaN layer grown on a silicon substrate. The MOSFET, with 10 ${\mu}M$ gate length and 100 ${\mu}M$ gate width, exhibits a threshold gate voltage of 2.7 V, and has a sub-threshold slope of 240 mV/dec taken from the $I_{DS}-V_{GS}$ characteristics at a low drain voltage of 0.05 V. The maximum drain current is 18 mA/mm and the maximum transconductance is 6 mS/mm at $V_{DS}$=3 V. We observed that the spectral photo-response characterization exhibits that the cutoff wavelength was 365 nm, and the UV/visible rejection ratio was about 130 at $V_{DS}$ = 5 V. The MOSFET-type UV detector using ITO, has a high UV photo-responsivity and so is highly applicable to the UV image sensors.

Property of Nickel Silicides with Hydrogenated Amorphous Silicon Thickness Prepared by Low Temperature Process (나노급 수소화된 비정질 실리콘층 두께에 따른 저온형성 니켈실리사이드의 물성 연구)

  • Kim, Jongryul;Choi, Youngyoun;Park, Jongsung;Song, Ohsung
    • Korean Journal of Metals and Materials
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    • v.46 no.11
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    • pp.762-769
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    • 2008
  • Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

Gas-Phase Technology and Microstructure of Fullerite Films

  • A.S. Berdinsky;Chun, Hui-Gon;Lee, Jing-Hyuk;Song, Yong-Hwa;Yu. V. Shevtsov
    • Journal of the Korean institute of surface engineering
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    • v.37 no.2
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    • pp.71-75
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    • 2004
  • The technology of $C_{60}$ fullerite films preparation by means of gas-phase deposition and structure of fullerite films are described. A three-channel flow plant was used to obtain fullerite films. The films were deposited in the flow of inert gas under reduced pressure onto a cooled silicon or sapphire substrate placed inside the reaction chamber of the plant. The plant allows one to obtain the films of pure fullerenes and to synthesise the films from fullerene compounds and doped fullerenes. The structure of two types of films were investigated by FE-SEM and SEM techniques: pure fullerite films onto silicon and sapphire substrates as well as compound films were studied by FE-SEM technique. All samples have shown columnar structure with high level of porosity. The synthesis of films composed of fullerene and its compounds for use in electronics is demonstrated to be promising. For example, experiments confirm the possibility to use fullerite films in sensor electronics to produce humidity and thermal sensors. It is also possible to use the sensitivity of these films to isotropic pressure. The experiments with $C_{60}$-Cu-J films have shown quite strong dependence of their resistance on pressure of different sort of medium-gas that could be used in gas-sensitive sensors. The structure and preparation technology of resistive sensor based on fullerite films are described.bed.

The fabrication of bolometric IR detector for glucose concentration detection (글루코오스 농도 측정을 위한 볼로미터 타입의 적외선 센서 제작)

  • Choi, Ju-Chan;Jung, Ho;Park, Kun-Sik;Park, Jong-Moon;Koo, Jin-Gun;Kang, Jin-Yeong;Kong, Seong-Ho
    • Journal of Sensor Science and Technology
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    • v.17 no.4
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    • pp.250-255
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    • 2008
  • A vanadium pentoxide ($V_2O_5$)-based bolometric infrared (IR) sensor has been designed and fabricated using micro electro mechanical systems (MEMS) technology for glucose detection and its resistive characteristics has been illustrated. The proposed bolometric infrared sensor is composed of the vanadium pentoxide array that shows superior temperature coefficient of resistance (TCR) and standard silicon micromachining compatibility. In order to achieve the best performance, deposited $V_2O_5$ thin film is optimized by adequate rapid thermal annealing (RTA) process. Annealed vanadium oxide thin film has demonstrated a linear characteristic and relatively high TCR value (${-4}%/^{\circ}C$). The resistance of vanadium oxide is changed by IR intensity based on glucose concentration.