• Title/Summary/Keyword: High power package

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A New Wire Bonding Technique for High Power Package Transistor (고출력 트랜지스터 패키지 설계를 위한 새로운 와이어 본딩 방식)

  • Lim, Jong-Sik;Oh, Seong-Min;Park, Chun-Seon;Lee, Yong-Ho;Ahn, Dal
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.4
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    • pp.653-659
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    • 2008
  • This paper describes the design of high power transistor packages using high power chip transistor dies, chip capacitors and a new wire bonding technique. Input impedance variation and output power performances according to wire inductance and resistance for internal matching are also discussed. A multi crossing type(MCT) wire bonding technique is proposed to replace the conventional stepping stone type(SST) wire bonding technique, and eventually to improve the output power performances of high power transistor packages. Using the proposed MCT wire bonding technique, it is possible to design high power transistor packages with highly improved output power compared to SST even the package size is kept to be the same.

Large Area Wafer-Level High-Power Electronic Package Using Temporary Bonding and Debonding with Double-Sided Thermal Release Tape (양면 열박리 테이프 기반 임시 접합 공정을 이용한 대면적 웨이퍼 레벨 고출력 전자패키지)

  • Hwang, Yong-Sik;Kang, Il-Suk;Lee, Ga-Won
    • Journal of Sensor Science and Technology
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    • v.31 no.1
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    • pp.36-40
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    • 2022
  • High-power devices, such as LEDs and radars, inevitably generate a large amount of heat, which is the main cause of shortening lifespan, deterioration in performance, and failure of electronic devices. The embedded IC process can be a solution; however, when applied to large-area substrates (larger than 8 in), there is a limit owing to the difficulty in the process after wafer thinning. In this study, an 8-in wafer-level high-power electronic package based on the embedded IC process was implemented with temporary bonding and debonding technology using double-sided thermal release tape. Good heat-dissipation characteristics were demonstrated both theoretically and experimentally. These findings will advance the commercialization of high-power electronic packaging.

Thermal Transient Characteristics of Die Attach in High Power LED Package

  • Kim Hyun-Ho;Choi Sang-Hyun;Shin Sang-Hyun;Lee Young-Gi;Choi Seok-Moon;Oh Yong-Soo
    • Journal of the Microelectronics and Packaging Society
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    • v.12 no.4 s.37
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    • pp.331-338
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    • 2005
  • The rapid advances in high power light sources and arrays as encountered in incandescent lamps have induced dramatic increases in die heat flux and power consumption at all levels of high power LED packaging. The lifetime of such devices and device arrays is determined by their temperature and thermal transients controlled by the powering and cooling, because they are usually operated under rough environmental conditions. The reliability of packaged electronics strongly depends on the die attach quality, because any void or a small delamination may cause instant temperature increase in the die, leading sooner or later to failure in the operation. Die attach materials have a key role in the thermal management of high power LED packages by providing the low thermal resistance between the heat generating LED chips and the heat dissipating heat slug. In this paper, thermal transient characteristics of die attach in high power LED package have been studied based on the thermal transient analysis using the evaluation of the structure function of the heat flow path. With high power LED packages fabricated by die attach materials such as Ag paste, solder paste and Au/Sn eutectic bonding, we have demonstrated characteristics such as cross-section analysis, shear test and visual inspection after shear test of die attach and how to detect die attach failures and to measure thermal resistance values of die attach in high power LED package. From the structure function oi the thermal transient characteristics, we could know the result that die attach quality of Au/Sn eutectic bonding presented the thermal resistance of about 3.5K/W. It was much better than those of Ag paste and solder paste presented the thermal resistance of about 11.5${\~}$14.2K/W and 4.4${\~}$4.6K/W, respectively.

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Acceleration Test for Package of High Power Phosphor Converted White Light Emitting Diodes (고출력 형광체변환 백색 LED 패키지의 가속시험)

  • Chan, Sung-Il;Yu, Yang-Gi;Jang, Joong-Soon
    • Journal of Applied Reliability
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    • v.10 no.2
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    • pp.137-148
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    • 2010
  • This study deals with the accelerated life test of high power phosphor converted white Light Emitting Diodes (High power LEDs). Samples were aged at $110^{\circ}C$/85% RH and $130^{\circ}C$/85% RH up to 900 hours under non-biased condition. The stress induced a luminous flux decay on LEDs in all the conditions. Aged devices exhibited modification of package silicon color from white to yellowish brown. The instability of the package contributes to the overall degradation of optical lens and structural degradations such as generating bubbles. The degradation mechanisms of lumen decay and reduction of spectrum intensity were ascribed to hygro-mechanical stress which results in package instabilities.

Thermal Performance Analysis for Cu Block and Dense Via-cluster Design of Organic Substrate in Package-On-Package

  • Lim, HoJeong;Jung, GyuIk;Kim, JiHyun;Fuentes, Ruben
    • Journal of the Microelectronics and Packaging Society
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    • v.24 no.4
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    • pp.91-95
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    • 2017
  • Package-On-Package (PoP) technology is developing toward smaller form factors with high-speed data transfer capabilities to cope with high DDR4x memory capacity. The common application processor (AP) used for PoP devices in smartphones has the bottom package as logic and the top package as memory, which requires both thermally and electrically enhanced functions. Therefore, it is imperative that PoP designs consider both thermal and power distribution network (PDN) issues. Stacked packages have poorer thermal dissipation than single packages. Since the bottom package usually has higher power consumption than the top package, the bottom package impacts the thermal budget of the top package (memory). This paper investigates the thermal and electrical characteristics of PoP designs, particularly the bottom package. Findings include that via and dense via-cluster volume have an important role to lower thermal resistance to the motherboard, which can be an effective way to manage chip hot spots and reduce the thermal impact on the memory package. A Cu block and dense via-cluster layout with an optimal location are proposed to drain the heat from the chip hot spots to motherboard which will enhance thermal and electrical performance at the design stage. The analytical thermal results can be used for design guidelines in 3D packaging.

Heat Dissipation Technology of IGBT Module Package (IGBT 전력반도체 모듈 패키지의 방열 기술)

  • Suh, Il-Woong;Jung, Hoon-Sun;Lee, Young-Ho;Kim, Young-Hun;Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
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    • v.21 no.3
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    • pp.7-17
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    • 2014
  • Power electronics modules are semiconductor components that are widely used in airplanes, trains, automobiles, and energy generation and conversion facilities. In particular, insulated gate bipolar transistors(IGBT) have been widely utilized in high power and fast switching applications for power management including power supplies, uninterruptible power systems, and AC/DC converters. In these days, IGBT are the predominant power semiconductors for high current applications in electrical and hybrid vehicles application. In these application environments, the physical conditions are often severe with strong electric currents, high voltage, high temperature, high humidity, and vibrations. Therefore, IGBT module packages involves a number of challenges for the design engineer in terms of reliability. Thermal and thermal-mechanical management are critical for power electronics modules. The failure mechanisms that limit the number of power cycles are caused by the coefficient of thermal expansion mismatch between the materials used in the IGBT modules. All interfaces in the module could be locations for potential failures. Therefore, a proper thermal design where the temperature does not exceed an allowable limit of the devices has been a key factor in developing IGBT modules. In this paper, we discussed the effects of various package materials on heat dissipation and thermal management, as well as recent technology of the new package materials.

A Compact 370 W High Efficiency GaN HEMT Power Amplifier with Internal Harmonic Manipulation Circuits (내부 고조파 조정 회로로 구성되는 고효율 370 W GaN HEMT 소형 전력 증폭기)

  • Choi, Myung-Seok;Yoon, Tae-San;Kang, Bu-Gi;Cho, Samuel
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1064-1073
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    • 2013
  • In this paper, a compact 370 W high efficiency GaN(Gallium Nitride) HEMT(High Electron Mobility Transistor) power amplifier(PA) using internal harmonic manipulation circuits is presented for cellular and L-band. We employed a new circuit topology for simultaneous high efficiency matching at both fundamental and 2nd harmonic frequency. In order to minimize package size, new 41.8 mm GaN HEMT and two MOS(Metal Oxide Semiconductor) capacitors are internally matched and combined package size $10.16{\times}10.16{\times}1.5Tmm^3$ through package material changes and wire bonded in a new package to improve thermal resistance. When drain biased at 48 V, the developed GaN HEMT power amplifier has achieved over 80 % Drain Efficiency(DE) from 770~870 MHz and 75 % DE at 1,805~1,880 MHz with 370 W peak output power(Psat.). This is the state-of-the-art efficiency and output power of GaN HEMT power amplifier at cellular and L-band to the best of our knowledge.

SiC Based Single Chip Programmable AC to DC Power Converter

  • Pratap, Rajendra;Agarwal, Vineeta;Ravindra, Kumar Singh
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.6
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    • pp.697-705
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    • 2014
  • A single chip Programmable AC to DC Power Converter, consisting of wide band gap SiC MOSFET and SiC diodes, has been proposed which converts high frequency ac voltage to a conditioned dc output voltage at user defined given power level. The converter has high conversion efficiency because of negligible reverse recovery current in SiC diode and SiC MOSFET. High frequency operation reduces the need of bigger size inductor. Lead inductors are enough to maintain current continuity. A complete electrical analysis, die area estimation and thermal analysis of the converter has been presented. It has been found that settling time and peak overshoot voltage across the device has reduced significantly when SiC devices are used with respect to Si devices. Reduction in peak overshoot also increases the converter efficiency. The total package substrate dimension of the converter circuit is only $5mm{\times}5mm$. Thermal analysis performed in the paper shows that these devices would be very useful for use as miniaturized power converters for load currents of up to 5-7 amp, keeping the package thermal conductivity limitation in mind. The converter is ideal for voltage requirements for sub-5 V level power supplies for high temperatures and space electronics systems.

Recent Overview on Power Semiconductor Devices and Package Module Technology (차세대 전력반도체 소자 및 패키지 접합 기술)

  • Kim, Kyoung-Ho;Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
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    • v.26 no.3
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    • pp.15-22
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    • 2019
  • In these days, importance of the power electronic devices and modules keeps increasing due to electric vehicles and energy saving requirements. However, current silicon-based power devices showed several limitations. Therefore, wide band gap (WBG) semiconductors such as SiC, GaN, and $Ga_2O_3$ have been developed to replace the silicon power devices. WBG devices show superior performances in terms of device operation in harsh environments such as higher temperatures, voltages and switching speed than silicon-based technology. In power devices, the reliability of the devices and module package is the critically important to guarantee the normal operation and lifetime of the devices. In this paper, we reviewed the recent trends of the power devices based on WBG semiconductors as well as expected future technology. We also presented an overview of the recent package module and fabrication technologies such as direct bonded copper and active metal brazing technology. In addition, the recent heat management technologies of the power modules, which should be improved due to the increased power density in high temperature environments, are described.