• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2008년도 춘계학술대회 논문집 센서 박막재료연구회 및 광주 전남지부
• /
• pp.45-49
• /
• 2008

Polyethylene is widely used as the insulator for power cable. To investigate the conduction mechanism for power cable insulation under ac high field, it is very important to acquire the dissipation current under actual running field. Recently, we have developed the unique system, which make possible to observe the nonlinear dissipation current waveform. In this system, to observe the nonlinear properties with high accuracy, capacitive current component is canceled by using inverse capacitive current signal instead of using the bridge circuit for canceling it. We have already reported that the dissipation currents of $40\;{\mu}m$ thick LDPE film at 10 kV/mm and over 140 Hz, it starts to show nonlinearity and odd number's harmonics were getting large. To investigate the conduction mechanis ms in this region, especially space charge effect, various kinds of estimation, such as time variations of instantaneous resistivity for one cycle, FFT spectra of dissipation current waveforms and so on, has been examined. As the results of these estimations, it was found that the dissipation current will depend on not only the instantaneous value of electric field but also the time differential of applied electric field due to taking a balance between applied field and internal field. Furthermore, two large peaks of dissipation current for each half cycle were observed under certain condition. In this paper, to clarify the reason why it shows two peaks for each half cycle, the film thickness dependences of dissipation current waveforms were observed by using the three different thickness LDPE films.

• 한국항행학회논문지
• /
• 제24권4호
• /
• pp.261-266
• /
• 2020

항공기 장착물에 KW급 전력변환장치가 탑재되는 경우, 전력 변환 시 발생하는 대량의 발열에 대한 방열설계가 고려되어야 한다. 적절한 방열을 하지 못하는 경우, 장비 오작동 및 화재의 우려가 발생하며 이는 항공기 운항에 있어 치명적인 요인이 될 수 있다. 본 논문은 항공기 장착물에 탑재되는 KW급 전력변환장치의 방열설계에 관하여 기술하였다. 전산해석을 통한 설계 및 제작 후 시험을 수행하였으며, 고전력 변환에 따른 발열부품의 급격한 발열 현상을 확인하여 해석 모델을 보정하였다. 모델 보정 후 방열구조가 개선된 형상으로 설계를 개선하였으며, 미 군사규격인 MIL-STD-810G 의 고온동작 시험을 수행하여 개선된 형상의 타당성을 검증하였다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2011년도 제42회 하계학술대회
• /
• pp.1603-1603
• /
• 2011

As time goes by these cables make a insulation problems, and ask for a preventive diagnosis method. Cable has very high electrostatic capacity and insulation defects mainly caused by water-tree(WT). Dissipation factor test is very useful for detecting WT but it needs huge power supply. In this paper we presented a cable insulation diagnosis by dissipation factor using low frequency power supply.

• 한국인터넷방송통신학회논문지
• /
• 제17권2호
• /
• pp.251-256
• /
• 2017

최근에 이르러, 범용 컴퓨터 뿐만이 아니라 임베디드 시스템 및 모바일 장치에서도 광범위하게 멀티코어 프로세서가 이용되어 그 성능이 증대되고 있다. 이러한 멀티코어 프로세서 시스템의 전력 소비량이 매우 중요하므로, 설계의 초기 단계에서 그 값을 정확하게 예측할 수 있어야 한다. 본 논문에서는 멀티코어 프로세서에 대하여 빠른 속도를 갖는 명령어 자취형 (trace-driven) 모의실험기 기반의 전력 분석기를 개발하였다. 이 때, 각 코어를 구성하는 하드웨어 유닛별 소비전력을 계산하여 합산하였다. 또한, SPEC 2000 벤치마크를 입력으로 모의실험을 수행하여 명령어 당평균 전력 소비량을 측정하였다.

• 전기전자학회논문지
• /
• 제25권3호
• /
• pp.528-533
• /
• 2021

본 논문은 전기자동차용 고밀도 DC-DC 컨버터의 PCB 방열특성에 대해 나타낸다. 본 논문은 또한 고밀도 DC-DC 컨버터의 방열구조를 분석하고 열해석 시뮬레이션을 통해 고밀도 전원장치의 PCB 방열 설계를 최적화한다. 따라서 본 논문에서는 열전달 이론을 바탕으로 일반적인 전자기기의 방열 경로를 분석하고 열저항 등가 회로를 모델링한다. 또한 본 논문의 연구 대상인 500[W]급 동기식 벅 컨버터의 열저항 등가 회로를 모델링 하여 방열 성능 향상을 위한 구조적인 방열 경로를 제시한다. 입력전압 72[V], 출력전압 12[V]의 500[W]급 동기식 벅 컨버터에 다면 방열 구조를 적용하여 열해석 시뮬레이션결과와 시작품의 실험을 통해 제안 구조의 타당성을 검증한다.

• 한국전기전자재료학회논문지
• /
• 제33권6호
• /
• pp.439-444
• /
• 2020

An increase in the temperature of photovoltaic (PV) modules causes reduced power output and shorter lifetime. Because of these characteristics, demands for the heat dissipation of PV modules are increasing. In this study, we attached a heat dissipation sheet to the back sheet of a shingled PV module and observed the temperature changes. The PV shingled module was tested under Standard Test Conditions (STCs; irradiance: 1,000 W/㎡, temperature: 25℃, air mass: 1.5) using a solar radiation tester, wherein the temperature of the PV module was measured by irradiating light for a certain duration. As a result, the temperature of the PV module with the heat dissipation sheet decreased by 3℃ compared to that without a heat dissipation sheet. This indicated that the power loss was caused by a temperature increase of the PV module. In addition, it was confirmed that the primary parameter contributing to the reduced PV module output power was the open circuit voltage (Voc).

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제12권3호
• /
• pp.341-352
• /
• 2012

This paper presents a Processing Engine (PE) which is used in Low Density Parity Codec (LDPC) application with a novel charge-recovery logic called pseudo-NMOS boost logic (pNBL), to achieve high-speed and low power dissipation. pNBL is a high-overdriven and low area consuming charge recovery logic, which belongs to boost logic family. Proposed Processing Engine is used in LDPC circuit to reduce operating power dissipation and increase the processing speed. To demonstrate the performance of proposed PE, a test chip is designed and fabricated with 0.18 2m CMOS technology. Simulation results indicate that proposed PE with pNBL dissipates only 1 pJ/cycle when working at the frequency of 403 MHz, which is only 36% of PE with the conventional static CMOS gates. The measurement results show that the test chip can work as high as 609 MHz with the energy dissipation of 2.1 pJ/cycle.

• 센서학회지
• /
• 제31권1호
• /
• pp.36-40
• /
• 2022

High-power devices, such as LEDs and radars, inevitably generate a large amount of heat, which is the main cause of shortening lifespan, deterioration in performance, and failure of electronic devices. The embedded IC process can be a solution; however, when applied to large-area substrates (larger than 8 in), there is a limit owing to the difficulty in the process after wafer thinning. In this study, an 8-in wafer-level high-power electronic package based on the embedded IC process was implemented with temporary bonding and debonding technology using double-sided thermal release tape. Good heat-dissipation characteristics were demonstrated both theoretically and experimentally. These findings will advance the commercialization of high-power electronic packaging.

• Journal of information and communication convergence engineering
• /
• 제9권3호
• /
• pp.301-304
• /
• 2011

This paper describes the possibility of a low-power, high-resolution fingerprint sensor chip. A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than conventional circuit. The detection circuit is designed and simulated in 3.3V, 0.35${\mu}$m standard CMOS process, 40MHz condition. The result shows about 27% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is more stable and effective than a typical circuit.

• 한국정보통신학회:학술대회논문집
• /
• 한국해양정보통신학회 2011년도 춘계학술대회
• /
• pp.692-695
• /
• 2011

This paper describes the possibility of a low-power, high-resolution fingerprint sensor chip. A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than conventional circuit. The detection circuit is designed and simulated in 3.3V, $0.35{\mu}m$ standard CMOS process, 40MHz condition. The result shows about 35% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is more stable and effective than a typical circuit.