• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.9 no.5
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• pp.51-56
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• 1995

The transistors of single phase 3 level PWM Inverter compose output power transistors and neutral point clamping transistors, which are NPN transistors. Waveforms of driving signals for this are PWM waves for power transistors and period operating waves for neutral point clamping transistors, which signals made W-type modulation from rectangular and sine wave. The output power transistors operate at ON-time complementary and neutral point clamping transistors operate at OFF-time complementary respectively. Therefore, each transistors operate in half period at parallel. Characteristics of this inverter circuit is parallel switching method about series switching method of general inverter. As modulation of 3 level drive signals made from full-wave rectifier of sine wave and rectangular wave, which are level wave about 3 level of complementary transistor inverter. So, this circuit composed complementary operation inverter of NPN transistors only compare with PNP-NPN complementary inverter, which have high power 3 level inverter of complementary operation.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1517-1523
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• 2015

The wavelet PWM (WPWM) technique has been applied in two-level inverters successfully, but directly applying the WPWM technique to three-level inverters is impossible. This paper proposes a WPWM technique suitable for a single-phase three-level inverter. The work analyzes the control strategy with the WPWM and obtains the design of its parameters. Compared with the SPWM technique for a single-phase three-level inverter under the same conditions, the WPWM can obtain high magnitudes of the output fundamental frequency component, low total harmonic distortion, and simpler digital implementation. The feasibility experiment is given to verify of the proposed WPWM technique.

• Proceedings of the Korean Institute of Building Construction Conference
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• 2015.05a
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• pp.13-14
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• 2015

To minimize construction of nuclear facility, it is required to reduce reinforcing bar amount and solve reinforcing bar concentration and for this, it is necessary to develop appication design technology and modular of high strength reinforcing bar. Hence, KHNP reduces excessive reinforcing bar amount which can cause possibility of poor construction of concrete through design standard development and modular of nuclear facility structure using high strength reinforcing bar to raise economics and has its purpose to maintain high-level safety and durability as they are. After reviewing the rebar drawing of the NPP structures and performing the mock-up test, the rebar modulation method in the various area of the NPP Structure has been established.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.12C
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• pp.1135-1141
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• 2007

In this paper, an adaptive bit-reliability mapping is proposed for the bit-level Chase combining in LDPC-coded high-order modulation systems. Contrary to the previously known bit-reliability mapping that assigns the information (or parity) bits to more (or less) reliable bit positions, the proposed mapping adaptively assigns codeword bits to the bit positions of various reliabilities by considering the characteristics of code and protection levels of bits in high-order modulation symbol. Compared with the symbol-level Chase combining and the constellation rearrangement bit mapping, the proposed mapping gives $0.7{\sim}1.3$ dB and $0.1{\sim}1.0$ dB performance gain at $FER=10^{-3}$ with no additional complexity, respectively. Adaptive bit-reliability mappings are derived for various environments and the validity of them is confirmed through simulation.

• Journal of Power Electronics
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• v.19 no.3
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• pp.702-713
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• 2019

Multilevel Inverters (MLIs) are widely used in medium voltage applications due to their various advantages. In addition, there are numerous types of MLIs for such applications. However, the diode-less 3-level (3L) T-type Neutral Point Clamped (NPC) MLI is the most advantageous due to its low conduction losses and high potential efficiency. The power circuit of a 3L T-type NPC is derived by the conventional two level inverter by a slight modification. In order to explore the MLI performance for various Pulse Width Modulation (PWM) schemes, this paper examines the operation of a 3L (five level line to line) T-type NPC MLI for various types of Multi-Carriers Pulse Width Modulation (MCPWM) schemes. These PWM schemes are compared in terms of their voltage profile, total harmonic distortion (THD) and conduction losses. In addition, a 3L T-type NPC MLI is also compared with the conventional NPC in terms of number of switches, clamping diodes, main diodes and capacitors. Moreover, the capacitor-balancing problem is also investigated using the Neutral Point Fluctuation (NPF) method with all of the MCPWM schemes. A 1kW 3L T-type NPC MLI is simulated in MATLAB/Simulink and implemented experimentally and its performance is tested with a 1HP induction motor. The results indicate that the 3L T-type NPC MLI has better performance than conventional NPC MLIs.

• Journal of Electrical Engineering and Technology
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• v.11 no.1
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• pp.125-134
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• 2016

We propose an efficient high voltage level shifter for a high side Buck converter driving a light-emitting diode (LED) lamp. The proposed circuit is comprised of a low voltage pulse width modulation (PWM) signal driver, a coupling capacitor, a resistor, and a diode. The proposed method uses a property of a PWM signal. The property is that the signal repeatedly transits between a low and high level at a certain frequency. A low voltage PWM signal is boosted to a high voltage PWM signal through a coupling capacitor using the property of the PWM signal, and the boosted high voltage PWM signal drives a p-channel metal oxide semiconductor (PMOS) transistor on the high side Buck converter. Experimental results show that the proposed level shifter boosts a low voltage (0 to 20 V) PWM signal at 125 kHz to a high voltage (370 to 380 V) PWM signal with a duty ratio of up to 0.9941.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.9
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• pp.8-12
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• 2015

A Holographic data storage has some advantage of fast transmission, short access time and high storage capacity. However, it has several problems such as inter-symbol interference, inter-page interference and misalignment. Especially, for multi-level holographic data storage system, since one pixel contains more than 1bit, the system is more vulnerable to the error. In this paper, we propose a 3/4 modulation code which mitigate inter-symbol interference for 4-level holographic data storage.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.6A
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• pp.607-613
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• 2008

In this paper, we investigate the performance of SMP-assisted 3GPP GERAN evolution system employing high order modulation and turbo coding. When applying the SMP which maps systematic bits into highly reliable bit positions, it is confirmed that there is the performance gain for the modulation and coding schemes of 16QAM(DAS-8) as well as 32QAM(DAS-11) by link level simulation.

• Journal of the Korea Society of Computer and Information
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• v.13 no.1
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• pp.135-141
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• 2008

The utilization techniques for multiple transmit and receive antennas or high capacity modulation schemes are essential to cope with the rapidly increasing demand for realizing more diverse wireless communication services with high rates. However, employing multiple receive antennas at the mobile units seems less practical due at the size and power limitations. Therefore, transmit diversify techniques have been extensively investigated for the downlink transmission to improve the performance In order to overcome the above mentioned problems, we construct a simulation model which combines STC and polarization diversity which scheme is requiring less cost to realize. Multi-level quadrature amplitude modulation (MQAM) is an attractive modulation scheme for wireless communication due to the high spectral efficiency it provides. Thus, the performance for our scheme is presented when 16QAM modulation techniques are applied. and compared with the former schemes.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.2
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• pp.150-158
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• 2017

This study proposes a new pulse-width modulation switching pattern for the low conduction loss of a three-level neutral point clamped (NPC)-based dual-active bridge (DAB) converter. The operational principle for a bidirectional power conversion is a phase-shift modulation. The conventional switching method of the three-level NPC-based DAB converter shows a symmetric switching pattern. This method has a disadvantage of high root-mean-square (RMS) value of the coupling inductor current, which leads to high conduction loss. The proposed switching method shows an asymmetrical pattern, which can reduce the RMS value of the inductor current with lower conduction loss than that of the conventional method. The performance of the proposed asymmetrical switching method is theoretically analyzed and practically verified using simulation and experiment.