• 대한전자공학회논문지
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• 제26권11호
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• pp.1706-1711
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• 1989

Unit processes for the fabrication of HEMT(high electron mobility transistor)was studied and the optimum conditions of them were applied to the fabrifcation of a discrete HEMT device. The HEMT with a nominal gate-source spacing of 3.6\ulcorner and a gate length of 2.8\ulcorner showed a transconductance of 46.1mS/mm and a threshold voltage of -0.29V. A source-drain voltage of 2.0V for a saturation current of 35mA/mm was achieved.

• Korean Chemical Engineering Research
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• 제48권4호
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• pp.511-514
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• 2010

불소계 고분자 물질인 $Cytop^{TM}$ 박막을 간단하고 경제적인 스핀코팅 방법을 이용하여 반도체 표면에 선택적으로 형성시킨 후, AlGaN/GaN HEMT 소자의 반도체 보호막(passivation layer)으로써 활용가능성을 고찰하기 위하여 전기적 특성이 분석되었다. $Cytop^{TM}$ 보호막이 적용된 AlGaN/GaN HEMT 소자와 적용되지 않은 소자의 게이트 래그 특성이 비교되었다. 보호막이 적용된 소자는 dc 대비 65%의 향상된 펄스 드레인 전류를 보였다. HEMT 소자의 rf 특성이 측정되었으며, $Cytop^{TM}$ 박막이 적용된 소자는 PECVE $Si_3N_4$ 보호막이 적용된 소자와 유사한 소자 특성을 나타냈다. 이는 게이트와 드레인 사이에 존재하는 표면상태 트랩의 보호막에 의한 감소에 의한 것으로 판단된다.

• 한국전자통신학회논문지
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• 제6권5호
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• pp.621-627
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• 2011

본 논문에서는 로드-풀을 이용하여 X-band에서 on-Wafer 상태의 GaN HEMT 소자에 대한 성능을 분석하고 분석한 결과를 바탕으로 최적의 임피던스 점을 분석하였다. 패키징 하기 전 on-Wafer 상태에 있는 반도체 소자의 최적의 임피던스 분석을 통해 소자 자체에서 최적의 성능을 내는 방안을 제안하였다. Gate length가 0.25um이고 Gate Width가 각각 400um, 800um인 소자에 대한 최적의 임피던스를 선정하여 성능을 분석한 결과, 400um는 $P_{sat}$=33.16dBm(2.06W), PAE=67.36%, Gain=15.16dBm의 성능을 가지며, 800um는 $P_{sat}$=35.9 dBm(3.9W), PAE=69.23%, Gain=14.87dB의 성능을 보였다.

• 반도체디스플레이기술학회지
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• 제13권4호
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• pp.55-58
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• 2014

The next-generation AlGaN/GaN HEMT power devices need higher power at higher frequencies. To know the device characteristics, the simulation of those devices are made. This paper presents a simulation study on the DC and RF characteristics of AlGaN/GaN HEMT power devices. According to the reduction of gate length from $2.0{\mu}m$ to $0.1{\mu}m$, the simulation results show that the drain current at zero gate voltage increases, the gate capacitance decreases, and the maximum transconductance increases, and thus the cutoff frequency and the maximum oscillation frequency increase. The maximum oscillation frequency maintains higher than the cutoff frequency, which means that the devices are useful for power devices at very high frequencies.

• JSTS:Journal of Semiconductor Technology and Science
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• 제1권2호
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• pp.111-115
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• 2001

Metamorphic InAlAs/InGaAs HEMT are successfully demonstrated, exhibiting several advantages over conventional P-HEMT on GaAs and LM-HEMT on InP substrate. The strain-relaxed metamorphic structure is grown by MBE on the GaAs substrate with the inverse-step graded InAlAs metamorphic buffer. The device with 40% indium content shows the better characteristics than the device with 53% indium content. The fabricated metamorphic HEMT with $0.2\mu\textrm{m}$T-gate and 40% indium content shows the excellent DC and microwave characteristics of $V_{th}-0.65V,{\;}g_{m,max}=620{\;}mS/mm,{\;}f_T120GHZ{\;}and{\;}f_{max}=210GHZ$.

• 전자공학회논문지A
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• 제28A권11호
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• pp.902-909
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• 1991

A reproducible selective dry etch process of GaAs/AlGaAs Heterostructures for High Electron Mobility Transistor(HEMT) Device fabrication is developed. Using RIE mode with $CCl_{2}F_{2}$ as the basic process gas, the observed etch selectivity of GaAs layer with respect to GaAs/$Al_{0.3}Ga_{0.7}$As is about 610:1. Severe polymer deposition problem, parialy generated from the use of $CCl_{2}F_{2}$ gas only, has been significantly reduced by adding a small amount of He gas or by $O_{2}$ plasma ashing after etch process. In order to obtain an optimized etch process for HEMT device fabrication, we com pared the properties of the wet etched Schottky contact with those of the dry etched one, and set dry etch condition to approach the characteristics of Schottky diode on wet etched surface. By applying the optimized etch process, the fabricated HEMT devices have the maximum transconductance $g_{mext}$ of 224 mS/mm, and have relatively uniform distribution across the 2inch wafer in the value of 200$\pm$20mS/mm.

• JSTS:Journal of Semiconductor Technology and Science
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• 제10권1호
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• pp.66-77
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• 2010

Improvement in breakdown voltage ($BV_{ds}$) and speed of the device are the key issues among the researchers for enhancing the performance of HEMT. Increased speed of the device aspires for shortened gate length ($L_g$), but due to lithographic limitation, shortening $L_g$ below sub-micrometer requires the inclusion of various metal-insulator geometries like T-gate onto the conventional architecture. It has been observed that the speed of the device can be enhanced by minimizing the effect of upper gate electrode on device characteristics, whereas increase in the $BV_{ds}$ of the device can be achieved by considering the finite effect of the upper gate electrode. Further, improvement in $BV_{ds}$ can be obtained by applying field plates, especially at the drain side. The important parameters affecting $BV_{ds}$ and cut-off frequency ($f_T$) of the device are the length, thickness, position and shape of metal-insulator geometry. In this context, intensive simulation work with analytical analysis has been carried out to study the effect of variation in length, thickness and position of the insulator under the gate for various metal-insulator gate geometries like T-gate, $\Gamma$-gate, Step-gate etc., to anticipate superior device performance in conventional HEMT structure.

• 한국전자파학회논문지
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• 제13권6호
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• pp.582-589
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• 2002

본 논문에서는 스위칭 소자인 beam lead 형태의 pin 다이오드대신에 저가인 증폭기용 HEMT를 스위칭소자로 하여 12 GHz 대역에서 동작하는 일정 삽입 손실의 5-비트 디지털 반사형 위상 변위기를 설계 및 제작한다. 기존의 이상적인 스위칭소자에 기초한 이론에 의해 설계할 때 필연적인 HEMT소자의 on, off시 큰 삽입손실차는 특정한 길이의 전송선로를 우선 스위칭 소자에 연결하여 HEMT소자의 on, off시 임피던스를 변환한 후 기존의 방식대로 설계하는 방법에 의해 제거할 쑤 있었다. 제작된 위상변위기는 설계 주파수인 12.2GHz - 12.7GHz 대역내 32단계의 스위칭 상태에서 삽입손실이 -4.5dB에서 -6dB 범위에 있으며 특히 전 단계에서 삽입 손실의 변화량이 1.5 dB 이내로 양호한 특성을 가져 본 논문에서 처음 시도한 임피던스 변환용 전송선에 의한 삽입 손실차 제거방법의 타당성을 확인할 수 있었다.

• 전력전자학회논문지
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• 제25권6호
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• pp.451-458
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• 2020

In this study, a trade-off analysis of a power conversion system (PCS) is performed in accordance with a power semiconductor device to establish the suitable operating frequency range for the anyplace induction heating system. A resonant network is designed under each operating frequency condition to compare and analyze the PCS losses depending on the power semiconductor device. On the basis of the simulation results, the PCS losses and frequency condition are calculated. The calculated results are then used for a trade-off analysis between Si-MOSFET and GaN-HEMT based on PCS. The suitable operating frequency range is determined, and the validity of the analysis results is verified by the experiment results.

• 전자공학회논문지A
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• 제29A권3호
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• pp.59-65
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• 1992

In this paper, the Numerov method is applied to solve the Schroedinger equation for $Al_{0.3}Ga_{0.7}AS/GaAs/Al_{0.3}Ga_{0.7}As$ double-heterojunction HEMT structures. The 3 subband energy levels, corresponding wave functions, 2-dimensional electron gas density, and conduction band edge profile are calculated from a self-consistent iterative solution of the Schroedinger equation and the Poisson equation. In addition, 2-dimensional electron gas densities in a quantum well of double heterostructure are calculated as a function of applied gate voltage. The density in the double heterojunction quantum well is increased to about more than 90%, however, the transconductance of the double heterostructure HEMT is not improved compared to that of the single heterostructure HEMT. Thus, double-heterojunction structures are expected to be suitable to increase the current capability in a HEMT device or a power HEMT structure.