• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.11
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• pp.1706-1711
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• 1989

Unit processes for the fabrication of HEMT(high electron mobility transistor)was studied and the optimum conditions of them were applied to the fabrifcation of a discrete HEMT device. The HEMT with a nominal gate-source spacing of 3.6\ulcorner and a gate length of 2.8\ulcorner showed a transconductance of 46.1mS/mm and a threshold voltage of -0.29V. A source-drain voltage of 2.0V for a saturation current of 35mA/mm was achieved.

• Korean Chemical Engineering Research
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• v.48 no.4
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• pp.511-514
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• 2010

Perfluorinated polymer($Cytop^{TM}$) was deposited on selective area of AlGaN/GaN HEMT structure using low cost and simple spin-coating method, and the electrical characteristics of the device was analyzed for application of passivation layer on semiconductors. Gate lag measurement results of $Cytop^{TM}$ passivated and unpassivated HEMT were compared. Passivated device shows improved 65 % pulsed drain current of dc mode value. Rf measurements were also performed. $Cytop^{TM}$ passivated HEMT have similar rf performance to PECVD grown $Si_3N_4$ passivated device. $Cytop^{TM}$ passivation layer may play an important role in mitigating surface state trapping in the region between gate and drain.

• The Journal of the Korea institute of electronic communication sciences
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• v.6 no.5
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• pp.621-627
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• 2011

In this paper, we analysed performance for on-wafer GaN HEMT using load-pull in X-band, and studied optimum impedance point based on analysis result. We suggested method of optimum performance device by analysis of optimum impedance for solid state device on-wafer condition before packaging. The measured device is gate length 0.25um, and gate width is 400um, 800um. device 400um is performed $P_{sat}$=33.16dBm, PAE=67.36%, Gain=15.16dBm, and device 800um is performed $P_{sat}$=35.91dBm, PAE=69.23%, Gain=14.87dBm.

• Journal of the Semiconductor & Display Technology
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• v.13 no.4
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• pp.55-58
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• 2014

The next-generation AlGaN/GaN HEMT power devices need higher power at higher frequencies. To know the device characteristics, the simulation of those devices are made. This paper presents a simulation study on the DC and RF characteristics of AlGaN/GaN HEMT power devices. According to the reduction of gate length from $2.0{\mu}m$ to $0.1{\mu}m$, the simulation results show that the drain current at zero gate voltage increases, the gate capacitance decreases, and the maximum transconductance increases, and thus the cutoff frequency and the maximum oscillation frequency increase. The maximum oscillation frequency maintains higher than the cutoff frequency, which means that the devices are useful for power devices at very high frequencies.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.2
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• pp.111-115
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• 2001

Metamorphic InAlAs/InGaAs HEMT are successfully demonstrated, exhibiting several advantages over conventional P-HEMT on GaAs and LM-HEMT on InP substrate. The strain-relaxed metamorphic structure is grown by MBE on the GaAs substrate with the inverse-step graded InAlAs metamorphic buffer. The device with 40% indium content shows the better characteristics than the device with 53% indium content. The fabricated metamorphic HEMT with $0.2\mu\textrm{m}$T-gate and 40% indium content shows the excellent DC and microwave characteristics of $V_{th}-0.65V,{\;}g_{m,max}=620{\;}mS/mm,{\;}f_T120GHZ{\;}and{\;}f_{max}=210GHZ$.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.11
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• pp.902-909
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• 1991

A reproducible selective dry etch process of GaAs/AlGaAs Heterostructures for High Electron Mobility Transistor(HEMT) Device fabrication is developed. Using RIE mode with $CCl_{2}F_{2}$ as the basic process gas, the observed etch selectivity of GaAs layer with respect to GaAs/$Al_{0.3}Ga_{0.7}$As is about 610:1. Severe polymer deposition problem, parialy generated from the use of $CCl_{2}F_{2}$ gas only, has been significantly reduced by adding a small amount of He gas or by $O_{2}$ plasma ashing after etch process. In order to obtain an optimized etch process for HEMT device fabrication, we com pared the properties of the wet etched Schottky contact with those of the dry etched one, and set dry etch condition to approach the characteristics of Schottky diode on wet etched surface. By applying the optimized etch process, the fabricated HEMT devices have the maximum transconductance $g_{mext}$ of 224 mS/mm, and have relatively uniform distribution across the 2inch wafer in the value of 200$\pm$20mS/mm.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.1
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• pp.66-77
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• 2010

Improvement in breakdown voltage ($BV_{ds}$) and speed of the device are the key issues among the researchers for enhancing the performance of HEMT. Increased speed of the device aspires for shortened gate length ($L_g$), but due to lithographic limitation, shortening $L_g$ below sub-micrometer requires the inclusion of various metal-insulator geometries like T-gate onto the conventional architecture. It has been observed that the speed of the device can be enhanced by minimizing the effect of upper gate electrode on device characteristics, whereas increase in the $BV_{ds}$ of the device can be achieved by considering the finite effect of the upper gate electrode. Further, improvement in $BV_{ds}$ can be obtained by applying field plates, especially at the drain side. The important parameters affecting $BV_{ds}$ and cut-off frequency ($f_T$) of the device are the length, thickness, position and shape of metal-insulator geometry. In this context, intensive simulation work with analytical analysis has been carried out to study the effect of variation in length, thickness and position of the insulator under the gate for various metal-insulator gate geometries like T-gate, $\Gamma$-gate, Step-gate etc., to anticipate superior device performance in conventional HEMT structure.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.6
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• pp.582-589
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• 2002

This paper presents 12.2 GHz ~ 12.7 GHz frequency band reflection type 5-bit digital phase shifter with constant insertion loss property that was fabricated with relatively low cost's InGaAs HEMT for amplifier. The unavoidable large insertion loss difference between on and off states of HEMT, when it is designed by conventional design theory based on ideal switching device, is removed by transforming the HEMT impedances at on and off states to other proper values connecting a certain length transmission line to HEMT and then applying the conventional design theory. The fabricated 5-bit digital phase shifter shows very good insertion loss properties of less than 1.5 dB insertion loss difference and -4.5 dB ~ -6 dB insertion loss in 35 phase steps at 12.2 GHz ~ 12.7 GHz. These results verify the design method presented in this paper, which is useful to design phase shifter of constant insertion loss with non-ideal switching device.

• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.6
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• pp.451-458
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• 2020

In this study, a trade-off analysis of a power conversion system (PCS) is performed in accordance with a power semiconductor device to establish the suitable operating frequency range for the anyplace induction heating system. A resonant network is designed under each operating frequency condition to compare and analyze the PCS losses depending on the power semiconductor device. On the basis of the simulation results, the PCS losses and frequency condition are calculated. The calculated results are then used for a trade-off analysis between Si-MOSFET and GaN-HEMT based on PCS. The suitable operating frequency range is determined, and the validity of the analysis results is verified by the experiment results.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.3
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• pp.59-65
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• 1992

In this paper, the Numerov method is applied to solve the Schroedinger equation for $Al_{0.3}Ga_{0.7}AS/GaAs/Al_{0.3}Ga_{0.7}As$ double-heterojunction HEMT structures. The 3 subband energy levels, corresponding wave functions, 2-dimensional electron gas density, and conduction band edge profile are calculated from a self-consistent iterative solution of the Schroedinger equation and the Poisson equation. In addition, 2-dimensional electron gas densities in a quantum well of double heterostructure are calculated as a function of applied gate voltage. The density in the double heterojunction quantum well is increased to about more than 90%, however, the transconductance of the double heterostructure HEMT is not improved compared to that of the single heterostructure HEMT. Thus, double-heterojunction structures are expected to be suitable to increase the current capability in a HEMT device or a power HEMT structure.