• Journal of the Korean earth science society
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• v.22 no.3
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• pp.195-207
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• 2001

The variations of D.O and pH due to the inflow of seawater by sluice gates operation were observed in the Lake Shihwa, Korea. The distributions of D.O and pH were investigated at 11 stations during Feburary 1997 to July 1998. The concentration of D.O before gate operation was 10 mg/l or more all over the watershed, yet 5 mg/l or less in the water layers of 11 m or below from March to June 1997. Anoxic layer appeared in June 1997 and expanded during rainy season. The anoxic layer in the lake depleted the oxygen in seawater as seawater was inflowed. It may be interpreted that the phenomenon comes from the contact of seawater to lower fresh water. The contact of seawater in pH 7.8 to 8.2 to lower water less than pH 7.4 enhanced to oxidize. After January 1998, D.O of the lake increased over 10 mg/l and the stratification was weakened. As a result, it may be concluded that the best way to improve the water qualities is to increase the amount of seawater inflow and outflow so as not to be generated pycnocline in summer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.122-122
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• 2008

Recently, Metal/Alumina/Silicon-Nitride/Silicon-Oxide/Silicon (MANOS) structures are one of the most attractive candidates to realize vertical scaling of high-density NAND flash memory [1]. However, as ANO layers are miniaturized, negative and positive bias temperature instability (NBTI/PBTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density increase, ${\Delta}D_{it}$, the gate leakage current, ${\Delta}I_G$. and the retention characteristics, in MONOS capacitors, becomes an important issue in terms of reliability. It is well known that tunnel oxide degradation is a result of the oxide and interfacial traps generation during FN (Fowler-Nordheim) stress [2]. Because the bias temperature stress causes an increase of both interfacial-traps and fixed oxide charge could be a factor, witch can degrade device reliability during the program and erase operation. However, few studies on NBTI/PBTI have been conducted on improving the reliability of MONOS devices. In this work, we investigate the effect of post-annealing gas on bias temperature instability (BTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density shift, ${\Delta}I_G$ retention characteristics, and the gate leakage current characteristics of MANOS capacitors. MANOS samples annealed at $950^{\circ}C$ for 30 s by a rapid thermal process were treated via additional annealing in a furnace, using annealing gases $N_2$ and $N_2-H_2$ (2 % hydrogen and 98 % nitrogen mixture gases) at $450^{\circ}C$ for 30 min. MANOS samples annealed in $N_2-H_2$ ambient had the lowest flat band voltage shift, ${\Delta}V_{FB}$ = 1.09/0.63 V at the program/erase state, and the good retention characteristics, 123/84 mV/decade at the program/erase state more than the sample annealed at $N_2$ ambient.

• Korean Journal of Agricultural Science
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• v.17 no.2
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• pp.102-114
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• 1990

This study was carried out to analyze the operation of the sluice gates by taking Sabkyo Reservoir as the model, and to examine the formulae of the design criteria for the Agricultural Land Improvement Project by hydraulic model experiments. The results were summarized as follows ; 1. According to the records of gate operation for 9 years, the mean height of the opened gates was 4.13 m, the mean number of operated gates were 4.04, the average annual number of operation were 67 times, the average annual operating time were 192.5 hours, and the average operating time were 2.88 hours. 2. The water supplied through Sabkyo Reservoir was 88.15 megatons per year, which was about 1.4 times the effective storage capacity. And the annual volume of pumping in May, which is the most water demanding season, was 29.56 megatons in average. 3. As the submerged orifice was transformed into the surface orifice, the suggested formulae for the orifice flow on the design criteria for the Agricultural Land Improvement Project showed a discontinuous line on the transition zone. It should be improved, because it is different from the real hydraulic phenomena. 4. The formulae for the orifice flow which are divided into the submerged and surface orifices are being used. However, these formulae could be substituted for the formular, $q=C{\cdot}W\sqrt{2gH_1}$, if the discharge coefficient considering the reservoir water level, the sea water level, and the gate opening height is used.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.170-170
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• 2010

Thin-film transistors (TFT) have become the key components of electronic and optoelectronic devices. Most conventional thin-film field-effect transistors in display applications use an amorphous or polycrystal Si:H layer as the channel. This silicon layers are opaque in the visible range and severely restrict the amount of light detected by the observer due to its bandgap energy smaller than the visible light. Therefore, Si:H TFT devices reduce the efficiency of light transmittance and brightness. One method to increase the efficiency is to use the transparent oxides for the channel, electrode, and gate insulator. The development of transparent oxides for the components of thin-film field-effect transistors and the room-temperature fabrication with low voltage operations of the devices can offer the flexibility in designing the devices and contribute to the progress of next generation display technologies based on transparent displays and flexible displays. In this thesis, I report on the dc performance of transparent thin-film transistors using amorphous indium tin zinc oxides for an active layer. $SiO_2$ was employed as the gate dielectric oxide. The amorphous indium tin zinc oxides were deposited by RF magnetron sputtering. The carrier concentration of amorphous indium tin zinc oxides was controlled by oxygen pressure in the sputtering ambient. Devices are realized that display a threshold voltage of 4.17V and an on/off ration of ${\sim}10^9$ operated as an n-type enhancement mode with saturation mobility with $15.8\;cm^2/Vs$. In conclusion, the fabrication and characterization of thin-film transistors using amorphous indium tin zinc oxides for an active layer were reported. The devices were fabricated at room temperature by RF magnetron sputtering. The operation of the devices was an n-type enhancement mode with good saturation characteristics.

• Journal of the Korean Vacuum Society
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• v.15 no.6
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• pp.630-636
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• 2006

Scale down of semiconductor gate pattern will make progress centrally line width into transistor according to the high integration and high density of flash memory semiconductor. Recently, the many researchers are in the process of developing research for using the ONO(oxide-nitride-oxide) technology for the gate pattern give body to line breadth of less 100 nm. Therefore, etch rate and etch profile of the line width detail of less 100 nm affect important factor in a semiconductor process. In case of increasing of the platen power up to 50 W at the ICP etcher, etch rate and PR selectivity showed good result when the platen power of ICP etcher has 100 W. Also, in case of changing of HBr gas flux at the platen power of 100 W, etch rate was decreasing and PR selectivity is increasing. We founded terms that have etch rate 320 nm/min, PR selectivity 3.5:1 and etch slope have vertical in the case of giving the platen power 100 W and HBr gas 35 sccm at the ICP etcher. Also notch was not formed.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.200-200
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• 2010

In recent times, metal oxide semiconductors thin films transistor (TFT), such as zinc and indium based oxide TFTs, have attracted considerable attention because of their several advantageous electrical and optical properties. There are many deposition methods for fabrication of ZnO-based materials such as chemical vapor deposition, RF/DC sputtering and pulsed laser deposition. However, these vacuum process require expensive equipment and result in high manufacturing costs. Also, the methods is difficult to fabricate various multicomponent oxide semiconductor. Recently, several groups report solution processed metal oxide TFTs for low cost and non vacuum process. In this study, we have newly developed solution-processed TFTs based on Ti-related multi-component transparent oxide, i. e., InTiO as the active layer. We propose new multicomponent oxide, Titanium indium oxide(TiInO), to fabricate the high performance TFT through the sol-gel method. We investigated the influence of relative compositions of Ti on the electrical properties. Indium nitrate hydrate [$In(NO^3).xH_2O$] and Titanium isobutoxide [$C_{16}H_{36}O_4Ti$] were dissolved in acetylacetone. Then monoethanolamine (MEA) and acetic acid ($CH_3COOH$) were added to the solution. The molar concentration of indium was kept as 0.1 mol concentration and the amount of Ti was varied according to weighting percent (0, 5, 10%). The complex solutions become clear and homogeneous after stirring for 24 hours. Heavily boron (p+) doped Si wafer with 100nm thermally grown $SiO_2$ serve as the gate and gate dielectric of the TFT, respectively. TiInO thin films were deposited using the sol-gel solution by the spin-coating method. After coating, the films annealed in a tube furnace at $500^{\circ}C$ for 1hour under oxygen ambient. The 5% Ti-doped InO TFT had a field-effect mobility $1.15cm^2/V{\cdot}S$, a threshold voltage of 4.73 V, an on/off current ratio grater than $10^7$, and a subthreshold slop of 0.49 V/dec. The 10% Ti-doped InO TFT had a field-effect mobility $1.03\;cm^2/V{\cdot}S$, a threshold voltage of 1.87 V, an on/off current ration grater than $10^7$, and a subthreshold slop of 0.67 V/dec.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.6
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• pp.742-750
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• 2018

In this paper, in order to enable zero-layer FTP cell using only 5V MOS devices on the basis of $0.13{\mu}m$ BCD process, the tunnel oxide thickness is used as the gate oxide thickness of $125{\AA}$ of the 5V MOS device at 82A. The HDNW layer, which is the default in the BCD process, is used. Thus, the proposed zero layer FTP cell does not require the addition of tunnel oxide and DNW mask. Also, from the viewpoint of memory IP design, a single memory structure which is used only for trimming analog circuit of PMIC chip is used instead of the dual memory structure dividing into designer memory area and user memory area. The start-up circuit of the BGR (Bandgap Reference Voltage) generator circuit is designed to operate in the voltage range of 1.8V to 5.5V. On the other hand, when the 64-bit FTP memory IP is powered on, the internal read signal is designed to maintain the initial read data at 00H. The layout size of the 64-bit FTP IP designed using the $0.13-{\mu}m$ Magnachip process .is $485.21{\mu}m{\times}440.665{\mu}m$($=0.214mm^2$).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.11
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• pp.71-76
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• 2008

H.264(or MPEG-4/AVC pt.10) is a high performance video coding standard, and is widely used. Variable length code (VLC) of the H.264 standard compresses data using the statistical distribution of values. A decoder parses the compressed bit stream and searches decoded values in lookup tables, and the decoding process is not easy to implement by hardware. We propose an architecture of variable length decoder(VLD) for the H.264 baseline profile(BP) L4. The CAVLD decodes syntax elements using the combination of arithmetic units and lookup tables for the optimized hardware architecture. A barral shifter and a first 1's detector parse NAL bit stream, and are shared by Exp-Golomb decoder and CAVLD. A FIFO memory between CAVLD and the reorder unit and a buffer at the output of the reorder unit eliminate the bottleneck of data stream. The proposed VLD is designed using Verilog-HDL and is implemented using an FPGA. The synthesis result using a 0.18um standard CMOS technology shows that the gate count is 22,604 and the decoder can process HD($1920{\times}1080$) video at 120MHz.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.12
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• pp.141-146
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• 2016

HEVC/H.265 is the latest joint video coding standard proposed by ITU-T SG 16 WP and ISO/IEC JTC 1/SC29/WG 11. In H.265, pictures are divided into a sequence of coding tree units(CTUs), and the CTU further is partitioned into multiple CUs to adapt to various local characteristics. Its coding efficiency is approximately two times high compared to previous standard H.264/AVC. However according to the size of extended CU(coding unit) and transform block, the hardware size of PMR(prediction/mode decision/reconstruction) block within video encoder is about 4 times larger than previous standard. In this study, we propose a new less complex hardware architecture of PMR block which has the most high complexity within encoder without any noticeable PSNR loss. Using this simplified block, we can shrink the overall size the H.265 encoder. For FHD image, it operates at clocking frequency of 300 MHz and frame rate of 60 fps. And also for the test image, the Bjøntegaard Delta (BD) bit rate increase about average 30 % in PMR prediction block, and the total estimated gate count of PMR block is around 1.8 M.

• Proceedings of the Korea Water Resources Association Conference
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• 2020.06a
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• pp.150-150
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• 2020

본 연구에서는 수리모형실험을 통하여 원형 다단 실린더 게이트 형식의 취수시설에서 발생하는 공기연행을 분석하였다. 수리모형실험의 원형은 경상북도 청도군에 위치한 운문댐의 "운문댐 안전성 강화사업"에서 계획되고 있는 신설취수탑을 기준으로 상사법칙은 Froude상사법칙을 적용하고 1/20의 모형 축척을 가지는 취수탑의 국부모형에 하류단 수위를 고려하기 위해 유량조절시설을 설치하여 실험을 실시하였다. 실험조건은 크게 두 가지로 구분하였으며, 수면으로부터 유입구 상단부까지의 거리 ∆h1(m)과 유입부 저수지 저류 수위와 하류단 유량조절시설간의 수위차인 ∆h2(m)이며, ∆h1에 대한 조건은 0.01m~0.06m로 0.01m 간격으로 6가지, ∆h2에 대한 조건은 0.10m~1.70m로 0.20m간격으로 9가지로 이를 조합하여 총 54개 CASE에 대해 진행하였다. 실험결과 공기연행 발생 시 그에 따른 영향을 평가하기 위해 발생 정도에 따라 미발생(Not Occur), 간헐적(Intermittent), 빈번한(Frequent), 지속적(Continuation), 공기 폭발(Air Explosion)로 분류하였으며, 각 공기연행 발생 시 취수유량의 감소율 및 영향을 분석한 결과 간헐적 공기연행 발생 시 최대 약 3.75%의 취수유량 감소, 빈번한 공기연행 발생 시 취수유량은 전체적으로 10%, 최대 약 13.19% 감소하였으며, 지속적 공기연행 발생 시 발생 이후 ∆h2증가에 의한 취수유량의 증가가 거의 이루어지지 않으며, 최대 56.25%의 취수유량이 감소, 공기 폭발 발생 시 취수유량의 영향은 지속적 발생과 비슷하나 관내 공기 포집 후 유입구로 방출 시 관에 강한 충격을 주어 안정성에도 큰 영향을 미칠 것으로 판단되어, 이에 안정성 및 취수유량 감소율을 고려하여 빈번, 지속, 공기 폭발 발생 영역에서의 취수는 적합하지 않으며, 공기연행 미발생 및 간헐적 발생 영역에서의 취수 시 목표 취수유량이 1.00~4.00(㎥/s)일 때 ∆h1= 0.40m 이상, 4.00~9.30(㎥/s) 일 때 ∆h1= 0.60m 이상, 9.30~9.53(㎥/s) 일 때 ∆h1=0.80m 이상, 9.53~9.65(㎥/s) 일 때 ∆h1= 1.00m 이상에서 취수유량 감소율 3.75% 이내로 취수유량의 확보가 가능하다. 이러한 결과는 원형 다단 실린더 게이트 형식의 취수시설에 대해 취수 시 수면와류에 의한 Air Core와 그에 따른 공기연행의 발생 조건과 영향을 수리모형실험을 통해 확인함으로써 실제 운용 시 보다 안정적이고 효율적인 운용에 대한 자료로 활용될 수 있을 것으로 판단되며, 추가로 수치해석을 통한 비교 및 공기연행과 관내 공기포집 정도에 대한 연구를 통해 보다 정확한 자료제시가 가능할 것으로 판단된다.