• 제목/요약/키워드: Gate resistor

검색결과 53건 처리시간 0.027초

계통 연계형 Hybrid Active NPC 인버터의 SiC MOSFET 오버슈트 전압 저감 (Reducing Overshoot Voltage of SiC MOSFET in Grid-Connected Hybrid Active NPC Inverters)

  • 이덕호;김예지;김석민;이교범
    • 전력전자학회논문지
    • /
    • 제24권6호
    • /
    • pp.459-462
    • /
    • 2019
  • This work presents methods for reducing overshoot voltages across the drain-source of silicon carbide (SiC) MOSFETs in grid-connected hybrid active neutral-point-clamped (ANPC) inverters. Compared with 3-level NPC-type inverter, the hybrid ANPC inverter can realize the high efficiency. However, SiC MOSFETs conduct its switching operation at high frequencies, which cause high overshoot voltages in such devices. These overshoot voltages should be reduced because they may damage switching devices and result in electromagnetic interference (EMI). Two major strategies are used to reduce the overshoot voltages, namely, adjusting the gate resistor and using a snubber capacitor. In this paper, advantages and disadvantages of these methods will be discussed. The effectiveness of these strategies is verified by experimental results.

낮은 입력 정재파비와 잡음을 갖는 수동 및 능동 바이어스를 사용한 저잡음증폭기에 관한 연구 (LNA Design Uses Active and Passive Biasing Circuit to Achieve Simultaneous Low Input VSWR and Low Noise)

  • 전중성
    • Journal of Advanced Marine Engineering and Technology
    • /
    • 제32권8호
    • /
    • pp.1263-1268
    • /
    • 2008
  • In this paper, the low noise power amplifier for GaAs FET ATF-10136 is designed and fabricated with active bias circuit and self bias circuit. To supply most suitable voltage and current, active bias circuit is designed. Active biasing offers the advantage that variations in the pinch-off voltage($V_p$) and saturated drain current($I_{DSS}$) will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets a gate-source voltage($V_{gs}$) for the desired drain voltage and drain current. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA, suitable for input stage matching and gate source bias. The LNA is fabricated on FR-4 substrate with active and self bias circuit, and integrated in aluminum housing. As a results, the characteristics of the active and self bias circuit LNA implemented more than 13 dB and 14 dB in gain, lower than 1 dB and 1.1 dB in noise figure, 1.7 and 1.8 input VSWR at normalized frequency $1.4{\sim}1.6$, respectively.

고출력 SSPA의 입력신호 차단시 최적화 게이트 저항 값에 따른 열폭주 현상의 개선에 관한 연구 (A Study on the Effectively Improvement of Thermal Runaway Phenomenon by Optimal Resistor without RF Input Signal of SSPA)

  • 황규일;이용민;나극환;신철재
    • 한국전자파학회논문지
    • /
    • 제10권6호
    • /
    • pp.910-916
    • /
    • 1999
  • This paper presents the effective improvement of the thermal runaway phenomenon in high power SSPA when the RF input signal is not provided. The total gate resistors are optimized by the experiments and deducing the variation of velocity and currents of thermal runaway, which is based on manufacturer's recommendation. Especially, it is solved the complex thermal runaway that related gate resistors with the gate voltage variable circuit. The result of this paper is able to apply for improving the thermal runaway in existence of high power SSPA for WLL, cellular system and PCS repeater.

  • PDF

A Study on the Adjusting Output Energy of the $CO_2$ Laser Controlled Directly in AC Power Line

  • Noh, Ki-Kyong;Jeong, Jong-Jin;Chung, Hyun-Ju;Kim, Hee-Je
    • KIEE International Transactions on Electrophysics and Applications
    • /
    • 제5C권4호
    • /
    • pp.152-154
    • /
    • 2005
  • We demonstrate a simple $CO_2$ laser by controlling firing angle of a TRIAC switch in ac power line. The power supply for our laser system switches the voltage of the AC power line (60Hz) directly. The power supply does not need elements such as a rectifier bridge, energy-storage capacitors, or a current-limiting resistor in the discharge circuit. In order to control the laser output power, the pulse repetition rate is adjusted up to 60Hz and the firing angle of TRIAC gate is varied from $45^{circ}$ to $135^{circ}$. A ZCS(Zero Crossing Switch) circuit and a PIC one-chip microprocessor are used to control the gate signal of the TRIAC precisely. The maximum laser output of 40W is obtained at a total pressure of 18 Torr, a pulse repetition rate of 60Hz, and a TRAIC gate firing angle of $90^{circ}$.

저전압형 SRM 인버터의 병렬운전 위한 새로운 스위칭 (New Switching Pattern for the Paralleling of SRM Low Voltage Inverter)

  • 이상훈;박성준;원태현;안진우;이만형
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
    • /
    • 제53권6호
    • /
    • pp.359-367
    • /
    • 2004
  • The switched reluctance motor(SRM) has considerable potential for industrial applications because of its high result lily as a result of the absence of rotor windings. In some applications with SRM, paralleling strategy is often used for cost saving, increasing of current capacity and system reliability. A SRM inverter has very low ,switching frequency. This results in reducing the burden for a high-speed of the gate-amp interface circuit. and the linearity of optocoupler is used to protect the instantaneous peak current for the stable operation. In this paper, series resistor is used to equal the current sharing of each switching device and a linear gate-amp is proposed to protect the instantaneous peak current which occurs in transient state. The proposed paralleling strategy is verified by experimental results.

CMOS 게이트에 의해서 구동되는 배선 회로의 타이밍 특성 분석 (Analysis of timing characteristics of interconnect circuits driven by a CMOS gate)

  • 조경순;변영기
    • 전자공학회논문지C
    • /
    • 제35C권4호
    • /
    • pp.21-29
    • /
    • 1998
  • As silicon geometry shrinks into deep submicron and the operating speed icreases, higher accuracy is required in the analysis of the propagation delays of the gates and interconnects in an ASIC. In this paper, the driving characteristics of a CMOS gate is represented by a gatedriver model, consisting of a linear resistor $R_{dr}$ and an independent ramp voltage source $V_{dr}$ . We drivered $R_{dr}$ and $V_{dr}$ as the functions of the timing data representing gate driving capability and an effective capacitance $C_{eff}$ reflecting resistance shielding effect by interconnet circuits. Through iterative applications of these equations and AWE algorithm, $R_{dr}$ , $V_{dr}$ and $C_{eff}$ are comuted simulataneously. then, the gate delay is decided by $C_{eff}$ and the interconnect circuit delay is determined by $R_{dr}$ and $V_{dr}$ . this process has been implemented as an ASIC timing analysis program written in C language and four real circuits were analyzed. In all cases, we found less than 5% of errors for both of gate andinterconnect circuit delays with a speedup factor ranging from a few tens to a few hundreds, compared to SPICE.SPICE.

  • PDF

UHF RFID 응용을 위한 NMOS 게이트 교차연결 전류미러형 브리지 정류기의 설계 및 해석 (Design and Analysis of a NMOS Gate Cross-connected Current-mirror Type Bridge Rectifier for UHF RFID Applications)

  • 박광민
    • 대한전자공학회논문지SD
    • /
    • 제45권6호
    • /
    • pp.10-15
    • /
    • 2008
  • 본 논문에서는 UHF RFID 응용을 위한 새로운 NMOS 게이트 교차연결 전류미러형 브리지 정류기를 제시하였다. 제시된 정류기의 직류 변환 특성은 고주파 등가회로를 이용하여 해석하였으며, 주파수 증가에 따른 게이트 누설전류를 회로적인 방법으로 줄일 수 있는 게이트 커패시턴스 감소 기법을 이론적으로 제시하였다. 구해진 결과, 제안한 정류기는 기존의 게이트 교차 연결형 정류기와 거의 같은 직류 출력전압 특성을 보이면서도, 게이트 누설전류가 1/4 이하로 감소하고, 부하저항에서의 소비전력도 30% 이상 감소하며, 부하저항의 변화에 대해 보다 안정적인 직류전압을 공급함을 알 수 있었다. 또한 제안한 정류기는 13.56MHz의 HF(for ISO 18000-3)부터 915MHz의 UHF(for ISO 18000-6) 및 2.45GHz의 마이크로파 대역 (for ISO 18000-4)까지의 전 주파수 범위에 대해 충분히 높고 잘 정류된 직류 변환 특성을 보여 특정 주파수 대역을 사용하는 다양한 RFID 시스템의 트랜스폰더 칩 구동을 위한 범용 정류기로 사용될 수 있다.

불규칙한 소오스/드레인 금속 접촉을 갖는 비대칭 n-MOSFET의 전기적 특성 및 모델 (Electrical Characteristics and Models for Asymmetric n-MOSFET′s with Irregular Source/Drain Contacts)

  • 공동욱;정환희;이재성;이용현
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 1999년도 추계종합학술대회 논문집
    • /
    • pp.208-211
    • /
    • 1999
  • Abstract - Electrical characteristics or asymmetric n-MOSFET's with different source and drain geometry are experimently investigated using test structures having various gate width. Saturation drain current and resistance in linear region are estimated by a simple schematic model, which consists of conventional device having parasitic resistor. A comparison of experimental results of symmetric and asymmetric devices gives the parasitic resistance caused by abnormal device structure. The suggested model shows good agreement with the measured drain current for both forward- and reverse-modes.

  • PDF

공진형 플라이백 DC-DC 컨버터용 동기정류기에 관한 연구 (A study on QR flyback DC-DC converter for synchronous rectifier)

  • 원기식;안태영
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2005년도 제36회 하계학술대회 논문집 B
    • /
    • pp.1395-1397
    • /
    • 2005
  • This paper presents a novel current driving method for the synchronous rectifier(SR) in a flyback topology. The proposed current driven synchronous rectifier features low power loss, good performance and the gate voltage of FET in the synchronous rectifier is easily controlled by resistor ratio. The proposed SR driving method is implemented in a 200W Flyback converter with 400Vdc input and achieved excellent performance at full load.

  • PDF

SRM 인버터의 병렬 스위칭을 위한 새로운 스위칭 패턴 (Novel Switching Pattern for the Paralleling of SRM Inverter)

  • 이상훈;이상훈;정성우;임헌호;박성준;안진우
    • 전력전자학회:학술대회논문집
    • /
    • 전력전자학회 2002년도 전력전자학술대회 논문집
    • /
    • pp.313-316
    • /
    • 2002
  • A SRM inverter has very low switching frequency. This results in reducing the burden for a high-speed of the gate-amp interface circuit. and the linearity of optocoupler is used to protect the intanteneous peak current for the stable operation In this paper, series resistor is used to equal the current sharing of each switching device and a linear gate-amp is proposed to protect the intanteneous peak current which occurs in transient state.

  • PDF