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http://dx.doi.org/10.6113/TKPE.2019.24.6.459

Reducing Overshoot Voltage of SiC MOSFET in Grid-Connected Hybrid Active NPC Inverters  

Lee, Deog-Ho (Dept. of Electrical and Computer Engineering, Ajou University)
Kim, Ye-Ji (Dept. of Electrical and Computer Engineering, Ajou University)
Kim, Seok-Min (Dept. of Electrical and Computer Engineering, Ajou University)
Lee, Kyo-Beum (Dept. of Electrical and Computer Engineering, Ajou University)
Publication Information
The Transactions of the Korean Institute of Power Electronics / v.24, no.6, 2019 , pp. 459-462 More about this Journal
Abstract
This work presents methods for reducing overshoot voltages across the drain-source of silicon carbide (SiC) MOSFETs in grid-connected hybrid active neutral-point-clamped (ANPC) inverters. Compared with 3-level NPC-type inverter, the hybrid ANPC inverter can realize the high efficiency. However, SiC MOSFETs conduct its switching operation at high frequencies, which cause high overshoot voltages in such devices. These overshoot voltages should be reduced because they may damage switching devices and result in electromagnetic interference (EMI). Two major strategies are used to reduce the overshoot voltages, namely, adjusting the gate resistor and using a snubber capacitor. In this paper, advantages and disadvantages of these methods will be discussed. The effectiveness of these strategies is verified by experimental results.
Keywords
Gate resistor; Snubber capacitor; Overshoot voltage; Hybrid active neutral-point-clamped; Grid-connected;
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