• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.3
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• pp.196-208
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• 2007

An analytical model is proposed for an optically controlled Metal Semiconductor Field Effect Transistor (MESFET), known as Optical Field Effect Transistor (OPFET) considering the diffusion fabrication process. The electrical parameters such as threshold voltage, drain-source current, gate capacitances and switching response have been determined for the dark and various illuminated conditions. The Photovoltaic effect due to photogenerated carriers under illumination is shown to modulate the channel cross-section, which in turn significantly changes the threshold voltage, drainsource current, the gate capacitances and the device switching speed. The threshold voltage $V_T$ is reduced under optical illumination condition, which leads the device to change the device property from enhancement mode to depletion mode depending on photon impurity flux density. The resulting I-V characteristics show that the drain-source current IDS for different gate-source voltage $V_{gs}$ is significantly increased with optical illumination for photon flux densities of ${\Phi}=10^{15}\;and\;10^{17}/cm^2s$ compared to the dark condition. Further more, the drain-source current as a function of drain-source voltage $V_{DS}$ is evaluated to find the I-V characteristics for various pinch-off voltages $V_P$ for optimization of impurity flux density $Q_{Diff}$ by diffusion process. The resulting I-V characteristics also show that the diffusion process introduces less process-induced damage compared to ion implantation, which suffers from current reduction due to a large number of defects introduced by the ion implantation process. Further the results show significant increase in gate-source capacitance $C_{gs}$ and gate-drain capacitance $C_{gd}$ for optical illuminations, where the photo-induced voltage has a significant role on gate capacitances. The switching time ${\tau}$ of the OPFET device is computed for dark and illumination conditions. The switching time ${\tau}$ is greatly reduced by optical illumination and is also a function of device active layer thickness and corresponding impurity flux density $Q_{Diff}$. Thus it is shown that the diffusion process shows great potential for improvement of optoelectronic devices in quantum efficiency and other performance areas.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.10
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• pp.24-31
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• 2003

Short channel effects (SCE) of bulk MOSFET with super-steep retrograded channels (SSR), fully-depleted SOI, and double-gate MOSFET have been analyzed using a evanescent-mode analysis. Analytical equations of the characteristics scaling-length (λ) for three structures have been derived and the accuracy of the calculated λ was verified by comparing to the device simulation result. It is found that the minimum channel length should be larger than 5λ and the depletion thickness of the SSR should be around 30 nm in order to be applicable to 70 nm CMOS technology. High-$textsc{k}$ dielectric shows a limitation in scaling due to the drain-field penetration through the dielectric unless the equivalent SiO2 thickness is very thin.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.8
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• pp.126-132
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• 1995

The electrical stress of short channel polycrystalline silicon (poly-Si) thin film transistor (TFT) has been investigated. The device characteristics of short channel poly-Si TFT with 5$\mu$m channel length has been observed to be significantly degraded such as a large shift in threshold voltage and asymmetric phenomena after the electrical stress. The dominant degradation mechanism in long channel poly-Si TFT's with 10$\mu$m and 20$\mu$m channel length respectively is charage trappling in gate oxide while that in short channel device with 5.mu.m channel length is defect creation in active poly-Si layer. We propose that the increased defect density within depletion region near drain junction due to high electric field which could be evidenced by kink effect, constitutes the important reason for this significant degradation in short channel poly-Si TFT. The proposed model is verified by comparing the amounts of the defect creation and the charge trapping from the strechout voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.3
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• pp.15-30
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• 2004

In this paper, an analytical modeling for the dark and photo-current characteristics of a buried-gate short- channel GaAs MESFET is presented. The presented model shows that the increase of drain current under illumination is largely due to not the increase of photo-conductivity in the neutral region but the narrowing effect of the depletion layer width. The carrier density profile within the neutral region is derived from solving the carrier continuity equation one-dimensionally. In deriving the photo-generated current, we assume that the photo-current is compensated with the thermionic emission current at the gate-channel interface. Moreover, the two-dimensional Poisson's equation is solved by taking into account the drain-induced longitudinal field effect. In conclusion, the proposed model seems to provide a reasonable explanation for the dark and photo current characteristics in a unified manner.

• Journal of IKEEE
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• v.22 no.1
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• pp.180-184
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• 2018

Gallium oxide ($Ga_2O_3$) and silicon carbide (SiC) are the material with the wide band gap ($Ga_2O_3-4.8{\sim}4.9eV$, SiC-3.3 eV). These electronic properties allow high blocking voltage. In this work, we investigated the characteristic of $Ga_2O_3$ and 4H-SiC vertical depletion-mode metal-oxide-semiconductor field-effect transistors. We demonstrated that the blocking voltage and on-resistance of vertical DMOSFET is dependent with structure. The structure of $Ga_2O_3$ and 4H-SiC vertical DMOSFET was designed by using a 2-dimensional device simulation (ATLAS, Silvaco Inc.). As a result, 4H-SiC and $Ga_2O_3$ vertical DMOSFET have similar blocking voltage ($Ga_2O_3-1380V$, SiC-1420 V) and then when gate voltage is low, $Ga_2O_3-DMOSFET$ has lower on-resistance than 4H-SiC-DMOSFET, however, when gate voltage is high, 4H-SiC-DMOSFET has lower on-resistance than $Ga_2O_3-DMOSFET$. Therefore, we concluded that the material of power device should be considered by the gate voltage.

• ETRI Journal
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• v.38 no.1
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• pp.133-140
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• 2016

This paper presents a method of parasitic inductance reduction for high-speed switching and high-efficiency operation of a cascode structure with a low-voltage enhancement-mode silicon (Si) metal-oxide-semiconductor field-effect transistor (MOSFET) and a high-voltage depletion-mode gallium nitride (GaN) fielde-ffect transistor (FET). The method is proposed to add a bonding wire interconnected between the source electrode of the Si MOSFET and the gate electrode of the GaN FET in a conventional cascode structure package to reduce the most critical inductance, which provides the major switching loss for a high switching speed and high efficiency. From the measured results of the proposed and conventional GaN cascode FETs, the rising and falling times of the proposed GaN cascode FET were up to 3.4% and 8.0% faster than those of the conventional GaN cascode FET, respectively, under measurement conditions of 30 V and 5 A. During the rising and falling times, the energy losses of the proposed GaN cascode FET were up to 0.3% and 6.7% lower than those of the conventional GaN cascode FET, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.11
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• pp.21-28
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• 2008

In this paper, we suggest an analytical model that can derive the I-V characteristics in the saturation region of a short channel GaAs MESFET. Instead of the pinch-off concept that has been used in the conventional models we can derive the two-dimensional potential in the depletion region in order that the velocity saturation region cannot be pinched-off and the current continuity condition can be satisfied. Obtained expression for the velocity saturation length is expressed in terms of the total channel length, channel doping density, gate voltage, and drain voltage. Compared with the conventional channel length shortening models, the present model seems to be considerably accurate and more reasonable in explaining the Early effect.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.199-199
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• 2011

Recently, Thin film transistors (TFTs) with amorphous oxide semiconductors (AOSs) can offer an important aspect for next generation displays with high mobility. Several oxide semiconductor such as ZnO, $SnO_2$ and InGaZnO have been extensively researched. Especially, as a well-known binary metal oxide, tin oxide ($SnO_2$), usually acts as n-type semiconductor with a wide band gap of 3.6eV. Over the past several decades intensive research activities have been conducted on $SnO_2$ in the bulk, thin film and nanostructure forms due to its interesting electrical properties making it a promising material for applications in solar cells, flat panel displays, and light emitting devices. But, its application to the active channel of TFTs have been limited due to the difficulties in controlling the electron density and n-type of operation with depletion mode. In this study, we fabricated staggered bottom-gate structure $SnO_2$-TFTs and patterned channel layer used a shadow mask. Then we compare to the performance intrinsic $SnO_2$-TFTs and doping hafnium $SnO_2$-TFTs. As a result, we suggest that can be control the defect formation of $SnO_2$-TFTs by doping hafnium. The hafnium element into the $SnO_2$ thin-films maybe acts to control the carrier concentration by suppressing carrier generation via oxygen vacancy formation. Furthermore, it can be also control the mobility. And bias stability of $SnO_2$-TFTs is improvement using doping hafnium. Enhancement of device stability was attributed to the reduced defect in channel layer or interface. In order to verify this effect, we employed to measure activation energy that can be explained by the thermal activation process of the subthreshold drain current.

• BMB Reports
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• v.54 no.6
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• pp.311-316
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• 2021

Ethanol often causes critical health problems by altering the neuronal activities of the central and peripheral nerve systems. One of the cellular targets of ethanol is the plasma membrane proteins including ion channels and receptors. Recently, we reported that ethanol elevates membrane excitability in sympathetic neurons by inhibiting Kv7.2/7.3 channels in a cell type-specific manner. Even though our studies revealed that the inhibitory effects of ethanol on the Kv7.2/7.3 channel was diminished by the increase of plasma membrane phosphatidylinositol 4,5-bisphosphate (PI(4,5)P₂), the molecular mechanism of ethanol on Kv7.2/7.3 channel inhibition remains unclear. By investigating the kinetics of Kv7.2/7.3 current in high K⁺ solution, we found that ethanol inhibited Kv7.2/7.3 channels through a mechanism distinct from that of tetraethylammonium (TEA) which enters into the pore and blocks the gate of the channels. Using a non-stationary noise analysis (NSNA), we demonstrated that the inhibitory effect of ethanol is the result of reduction of open probability (P_O) of the Kv7.2/7.3 channel, but not of a single channel current (i) or channel number (N). Finally, ethanol selectively facilitated the kinetics of Kv7.2 current suppression by voltage-sensing phosphatase (VSP)-induced PI(4,5)P₂ depletion, while it slowed down Kv7.2 current recovery from the VSP-induced inhibition. Together our results suggest that ethanol regulates neuronal activity through the reduction of open probability and PI(4,5)P₂ sensitivity of Kv7.2/7.3 channels.

• Journal of Korean Society of Coastal and Ocean Engineers
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• v.23 no.6
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• pp.489-495
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• 2011

Fossil fuel energy has become a worldwide environmental issue due to its effect on global warming and depletion in its supply. Therefore, the interest in developing alternative energy source has been rising. Ocean energy, especially, has gained strength as an alternative energy source for its unlimited supply with low secondary risks. Among all the ocean energy, the west coast of Korea holds the field of large-scale energy development because of its distinctive tidal range. Tidal power plant construction at the sea may expedite multi development effects such as bridge roles, tourism resource effects and adjustability of flood inundation at the inner bay. This study introduces the validity of tidal power plant construction at Garilim Bay in west coast of Korea by examining anticipated hydraulic characteristics using EFDC model. Through EFDC numerical simulations, the feasibility of Garolim Bay as a tidal power plant field has been proved. And the most effective tidal power plant construction would be to install hydraulic turbine in the west side of bay entrance where ebb current is stronger, and install water gate in the east side of bay entrance where the flood current is superior.