• Journal of Sensor Science and Technology
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• v.31 no.1
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• pp.1-5
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• 2022

In this paper, the photocurrent characteristics of gate/body-tied (GBT) metal-oxide semiconductor field-effect transistor (MOSFET)-type photodetector with high sensitivity in the 408 nm - 941 nm range are presented. High sensitivity is important for photodetectors, which are used in several scientific and industrial applications. Owing to its inherent amplifying characteristics, the GBT MOSFET-type photodetector exhibits high sensitivity. The presented GBT MOSFET-type photodetector was designed and fabricated via a standard 0.18 ㎛ complementary metal-oxide-semiconductor (CMOS) process, and its characteristics were analyzed. The photodetector was analyzed with respect to its width to length (W/L) ratio, bias voltage, and incident-light wavelength. It was confirmed experimentally that the presented GBT MOSFET-type photodetector has over 100 times higher sensitivity than a PN-junction photodiode with the same area in the 408 nm - 941 nm range.

• Proceedings of the KIEE Conference
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• 2008.10b
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• pp.165-168
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• 2008

The experimental results of exposing IGBT (Insulated Gate Bipolar Transistor) samples to gamma radiation source show shifting of threshold voltages in the MOSFET and degradation of carrier mobility and current gains. At low total dose rate, the shift of threshold voltage is the major contribution of current increases, but for more than some total dose, the current is increased because of the current gain degradation occurred in the vertical PNP at the output of the IGBTs. In the paper, the collector current characteristics as a function of gate emitter voltage (VGE) curves are tested and analyzed with the model considering the radiation damage on the devices for gate bias and different dose. In addition, the model parameters between simulations and experiments are found and studied.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.5
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• pp.364-369
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• 2011

Analyzing electrical degradation of polycrystalline silicon transistor to applicable at several environment is very important issue. In this research, after fabricating p channel poly crystalline silicon TFT (thin film transistor) electrical characteristics were compare and analized that changed by gate bias with first measurement. As a result on and off current was reduced by variation of gate bias and especially re duce ratio of off current was reduced by $7.1{\times}10^1$. On/off current ratio, threshold voltage and electron mobility increased. Also, when channel length gets shorter on/off current ratio was increased more and thresh old voltage increased less. It was cause due to electron trap and de-trap to gate silicon oxide by variation of gate bias.

• Journal of Information Display
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• v.9 no.4
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• pp.35-38
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• 2008

This paper reports the electrical characteristics of polyvinylpyrrolidone (PVPy) and the performance of organic thin-film transistors (OTFTs) with PVPy as a gate insulator. PVPy shows a dielectric constant of about 3 and contributes to the upright growth of pentacene molecules with $15.3\AA$ interplanar spacing. OTFT with PVPy exhibited a field-effect mobility of 0.23 $cm^2$/Vs in the saturation regime and a threshold voltage of -12.7 V. It is notable that there was hardly any threshold voltage shift in the gate voltage sweep direction. Based on this reliable evidence, PVPy is proposed as a new gate insulator for reliable and high-performance OTFTs.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.3
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• pp.233-237
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• 2002

A giga-bit DRAM(dynamic random access memory) technology with W/WNx/poly-Si dual gate electrode is presented in 7his papers. We fabricated $0.16\mu\textrm{m}$ CMOS using this technology and succeeded in suppressing short-channel effects. The saturation current of nMOS and surface-channel pMOS(SC-pMOS) with a $0.16\mu\textrm{m}$ gate was observed 330 $\mu\A/\mu\textrm{m}$ and 100 $\mu\A/\mu\textrm{m}$ respectively. The lower salutation current of SC-pMOS is due to the p-doped poly gate depletion. SC-pMOS shows good DIBL(dram-induced harrier lowering) and sub-threshold characteristics, and there was no boron penetration.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.10
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• pp.71-78
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• 1994

We have developed GaAs power metal semiconductor field effect transistors (MESFETs) for 4.7V operation under 900 MHz using a low-high deped structures grown by molecular beam epitaxy (MBE). The fabricted MESFETs with a gate widty of 7.5 mm and a gate length of 1.0.mu.m show a saturated drain current (Idss) of 1.7A and an uniform transconductance (Gm) of around 600mS, for gate bias ranged from -2.4 V to 0.5 V. The gate-drain breakdown voltage is measured to be higher than 25 V. The measured rf characteristics of the MESFETs at a frequency of 900 MHz are the output power of 31.4 dBm and the power added efficiency of 63% at a drain bias of 4.7 V.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.3
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• pp.118-123
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• 1995

We have successfully fabricated a super low noise pseudomorphic HEMT(PHEMT) device with AlGaAs/InGaAs/GaAs sturcture by using improved T-Gate which have increased a large gaet cross-sectional area about two times in comparision with those of conventional T-gate processes. The PHEMSTs with 0.15$\mu$m-long and 140$\mu$m-wide gates have eshibited a super low noise characteristics, the noise figure of 0.45dB with associated gain of 10.87dB at 12GHz. The cut-off rewuqncy of the device is 94gHz with a transconductance of 418mS/mm.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.2
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• pp.105-108
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• 2020

In this study, experiments and simulations were conducted for a 1,200-V-class trench Si insulated-gate bipolar transistor (IGBT) with a small cell pitch below 2.5 ㎛. Presently, as a power device, the 1,200-V-class trench Si IGBT is used for automotives including electric vehicles, hybrid electric vehicles, and industrial motors. We obtained a breakdown voltage of 1,440 V, threshold of 6 V, and state voltage drop of 1.75 V. This device is superior to conventional IGBTs featuring a planar gate. To derive its electrical characteristics, we extracted design and process parameters. The cell pitch was 0.95 ㎛ and total wafer thickness was 140 ㎛ with a resistivity of 60 Ω·cm. We will apply these results to achieve fine-pitch gate power devices suitable for electrical automotive industries.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.12
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• pp.1021-1026
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• 2002

As the development of semiconductor process technology continue to advance, ICs continue their trend toward higher performance low power system-on-chip (SOC). These circuits require on board multi power supply. In this paper, a 0.5 ㎛ dual date oxide CMOS Process technology for multi-power application is demonstrated. 5 V and 20 V devices fabricated by proposed process is measured. From 5 V devices using dual gate precess, we got almost the same characteristics as are obtained from standard 5 V devices. And the characteristics of the 20 V device demonstrates that 3 ㎛ devices with minimum gate length are available without reliability degradation. Electrical parameters in minimum 3 ㎛ devices are 520 ㎂/㎛ current density, 120 ㎷ DIBL, 24 V BV for NMOS and ,350 ㎂/㎛ current density, 180 ㎷ DIBL, 26 V BV for PMOS, respectively.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.917-919
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• 2009

Effects of nano-silver contents(15~50wt%) on screen printed-etched gate electrodes and electrical characteristics of OTFTs were investigated. As Ag contents increased, the screen-printed film was transferred exactly without spreading and obtained the densely-packed layer with a stable and excellent conductivity but, its thickness was increased and surface became rougher. It was found that the leakage current of MIM devices and off-state currents of OTFTs became larger due to poor step coverage of PVP dielectric layer on the thick and rough gate electrodes for nano-Ag inks with Ag contents more than 30wt%.