• 한국전기전자재료학회논문지
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• 제28권5호
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• pp.291-294
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• 2015

Recently, ZnO based oxide TFTs used in the flexible and transparent display devices are widely studied. To apply to OLED display switching devices, electrical performance and stability are important issues. In this study, to improve these electrical properties, we fabricated TFTs having Al doped Zinc Oxide (AZO) layer inserted between the gate insulator and ZnO layer. The AZO and ZnO layers are deposited by Atomic layer deposition (ALD) method. I-V transfer characteristics and stability of the suggested devices are investigated under the positive gate bias condition while the channel defects are also analyzed by the photoluminescence spectrum. The TFTs with AZO layer show lower threshold voltage ($V_{th}$) and superior sub-threshold slop. In the case of $V_{th}$ shift after positive gate bias stress, the stability is also better than that of ZnO channel TFTs. This improvement is thought to be caused by the reduced defect density in AZO/ZnO stack devices, which can be confirmed by the photoluminescence spectrum analysis results where the defect related deep level emission of AZO is lower than that of ZnO layer.

• 한국정보통신학회논문지
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• 제18권5호
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• pp.1149-1154
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• 2014

본 연구는 산화물반도체트랜지스터의 터널링 현상을 살펴보기 위해서 게이트 절연막으로서 SiOC 박막을 사용하고 채널층으로 IGZO를 이용하여 트랜지스터를 제작 하였다. SiOC 박막은 분극이 작아질수록 비정질특성이 우수해지면서 절연특성이 좋아진다. SiOC 게이트 절연막과 채널 층 사이의 계면에 존재하는 접합특성은 SiOC의 분극특성에 따라서 달려졌다. 드레인소스 전류($I_{DS}$)와 게이트소스 전압($V_{GS}$)의 전달특성은 분극이 낮은 SiOC를 사용할 경우 양방향성 전달특성이 나타나고 분극이 높은 SiOC 게이트 절연막을 사용할 경우 단방향성 전달 특성이 나타났다. 터널링에 의한 양방향성 트랜지스터의 경우 바이어스 인가 전압이 낮은 ${\pm}1V$의 영역에서 쇼키접합을 나타냈었지만 트래핑효과에 의한 단방향성 트랜지스터의 경우 오믹접합 특성을 나타내었다. 특히 양방향성 트랜지스터의 경우 터널링 현상에 의하여 on/off 스위칭 특성이 개선되었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.331-331
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• 2009

Hafnium oxide ($HfO_2$) attracted by one of the potential candidates for the replacement of si-based oxides. For applications of the high-k gate dielectric material, high thermodynamic stability and low interface-trap density are required. Furthermore, the amorphous film structure would be more effective to reduce the leakage current. To search the gate oxide materials, metal-insulator-metal (MIM) capacitors was fabricated by pulsed laser deposition (PLD) on indium tin oxide (ITO) coated glass with different oxygen pressures (30 and 50 mTorr) at room temperature, and they were deposited by Au/Ti metal as the top electrode patterned by conventional photolithography with an area of $3.14\times10^{-4}\;cm^2$. The results of XRD patterns indicate that all films have amorphous phase. Field emission scanning electron microscopy (FE-SEM) images show that the thickness of the $HfO_2$ films is typical 50 nm, and the grain size of the $HfO_2$ films increases as the oxygen pressure increases. The capacitance and leakage current of films were measured by a Agilent 4284A LCR meter and Keithley 4200 semiconductor parameter analyzer, respectively. Capacitance-voltage characteristics show that the capacitance at 1 MHz are 150 and 58 nF, and leakage current density of films indicate $7.8\times10^{-4}$ and $1.6\times10^{-3}\;A/cm^2$ grown at 30 and 50 mTorr, respectively. The optical properties of the $HfO_2$ films were demonstrated by UV-VIS spectrophotometer (Scinco, S-3100) having the wavelength from 190 to 900 nm. Because films show high transmittance (around 85 %), they are suitable as transparent devices.

• 한국전기전자재료학회논문지
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• 제24권6호
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• pp.458-462
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• 2011

Soution-processed ZrInZnO (ZIZO) thin-film transistors (TFTs) with varying Zr content were fabricated. The ZIZO TFT (Zr=20 at. %/Zn) has an optimal performance with the saturation field effect mobility of 0.77 $cm^2/Vs$, the threshold voltage (Vth) of 2.1 V, the on/off ratio of $4.95{\times}10^6$, and subthreshold swing (S.S) of 0.73 V/decade. Using this optimized ZIZO TFT, the positive and negative gate bias stress according to annealing temperature was also investigated. While the Vth shifts dramatically after 1,000 s of both gate bias stresses, variations in the S.S are negligible. It suggests that electrons or holes are tem porarily trapped in the gate insulator, the semiconductor, or the interface between both layers.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 C
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• pp.1585-1587
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• 2004

이중 에피층 구조를 가지는 SOI(Silicon-On-Insulator) LIGBT(Lateral Insulated Gate Bipolar Transistor)의 에피층 두께 변화에 따른 항복전압 특성을 분석하였다. 제안된 소자는 전하보상효과를 얻기 위해 n/p-epi의 이중 에피층 구조를 사용하였으며, 에피층 전체에 걸쳐서 전류가 흐를 수 있도록 하기 위해 trenched anode구조를 채택하였다. 본 논문에서는 n/p-epi층의 농도를 고정시킨 후 각각의 epi층의 두께를 변화시켜가며 simulation을 수행하였을 때 항복전압의 변화 및 표면과 epi층에서의 전계분포변화를 분석하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.61-61
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• 2009

P-type SGS-TFTs with 10 ${\mu}m$ channel length and two channel widths; $W_1=5{\mu}m$ and $W_2=10{\mu}m$ which has gate insulator made of 20nm $SiO_2$ and 80nm SiNx was fabricated and the electrical properties of them were measured. The field-effect mobility was increased from 95.84 to 104.19 $cm^2/V-s$ and threshold voltage also increased from -0.802 V to -0.954 V, when channel width is increased from5 ${\mu}m$ to 10 ${\mu}m$. Subthreshold swing decreased from 0.418 to 0.343 V/dec and $I_{on/off}$ ratio increased from $4.77{\times}10^7$ to $7.30{\times}10^7$.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.62-62
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• 2009

Electrical properties of SGS-TFT with 5/5 ${\mu}m$ channel width and length which gate insulator is made of 20nm $SiO_2$ and 80nm $SiN_x$ was fabricated and measured at various temperatures. The field-effect mobility was decreased from 86.25 to 80.42 $cm^2/Vs$ and threshold voltage also decreased from -1.5792 to -1.0492 V, when temperature is increased from room temperature to $100^{\circ}C$. Subthreshold swing, also, increased from 0.3212 to 0.4818 V/dec and $I_{on/off}$ ratio decreased from $5.05{\times}10^7$ to $6.93{\times}10^5$.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
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• pp.489-492
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• 2004

In this paper, we demonstrate polymer thin-film transistors (TFTs) on a paper-based flexible substrate. As a substrate, commercially available photo-paper is used with Parylene coating. The parylene layer enables conventionally used wet chemical process and vacuum deposition processes for electrodes and gate insulator. As an active channel layer, we used poly-3-hexylthiophene (P3HT) which is solution process. Field effect mobility up to $(0.06 {\pm} 0.02) cm^2/Vs$ and on/off ratio of $10^3 {\~}10^4$ are achieved on a photo-paper.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.889-892
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• 2004

We developed a high performance bottom contact, organic thin-film transistor (OTFT) array on plastic using a self-organized process. The effect of OTS treatment on the PVP gate insulator for the performance of OTFT on plastic has been studied The OTFT without OTS exhibited a field-effect mobility of 0.1 $cm^2$/Vs on/off current ratio of > $10^7$. On the other hand, OTFT with OTS, exhibited a field-effect mobility of 1.3 $cm^2$/Vs and on/off current ratio of>$10^8$.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.356-358
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• 2004

In this paper we fabricated and succeeded to demonstrate a test panel for AMOLED on 2" glass and PET substrate. The test panel consisted of an array of 64 x 64 pixels in which OLEDs was driven by pentacene TFT. OTFTs were made of the inverted staggered structure and employed polyvinylphenol as the gate insulator and pentacene thin film as the active layer, producing the filed effect mobility of 0.3$cm^2$/V.sec and on/off current ratio of $10^5$. OLEDs were composed of TPD for HTL and Alq3 for EML with 35nm thick each, generating green monochrome light.