• 제목/요약/키워드: Field Effect Mobility

검색결과 517건 처리시간 0.033초

Hot Wall Epitaxy(HWE)법에 의한 BaIn2S4 단결정 박막 성장과 광전도 특성 (Growth and optical conductivity properties for BaIn2S4 single crystal thin film by hot wall epitaxy)

  • 정경아;홍광준
    • 한국결정성장학회지
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    • 제25권5호
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    • pp.173-181
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    • 2015
  • A stoichiometric mixture of evaporating materials for $BaIn_2S_4$ single crystal thin films was prepared from horizontal electric furnace. To obtain the single crystal thin films, $BaIn_2S_4$ mixed crystal was deposited on thoroughly etched semi-insulating GaAs(100) substrate by the Hot Wall Epitaxy (HWE) system. The source and substrate temperatures were $620^{\circ}C$ and $420^{\circ}C$, respectively. The crystalline structure of the single crystal thin films was investigated by double crystal X-ray diffraction (DCXD). The carrier density and mobility of $BaIn_2S_4$ single crystal thin films measured from Hall effect by van der Pauw method are $6.13{\times}10^{17}cm^{-3}$ and $222cm^2/v{\cdot}s$ at 293 K, respectively. The temperature dependence of the energy band gap of the $BaIn_2S_4$ obtained from the absorption spectra was well described by the Varshni's relation, $E_g(T)=3.0581eV-(3.9511{\times}10^{-3}eV/K)T^2/(T+536K)$. The crystal field and the spin-orbit splitting energies for the valence band of the $BaIn_2S_4$ have been estimated to be 182.7 meV and 42.6 meV, respectively, by means of the photocurrent spectra and the Hopfield quasicubic model. These results indicate that the splitting of the ${\Delta}so$ definitely exists in the ${\Gamma}_5$ states of the valence band of the $BaIn_2S_4/GaAs$ epilayer. The three photocurrent peaks observed at 10 K are ascribed to the $A_1$-, $B_1$-exciton for n = 1 and $C_{24}$-exciton peaks for n = 24.

인공강우와 콩재배 포장 라이시메타를 이용한 endosulfan의 유출량 평가 (Runoff of Endosulfan by Rainfall Simulation and from Soybean-grown Field Lysimeter)

  • 김찬섭;이희동;임양빈;임건재
    • 한국환경농학회지
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    • 제26권4호
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    • pp.343-350
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    • 2007
  • 강우에 의한 경사지 토양으로부터의 농약 유출양상을 파악하고 그에 대한 농약의 특성, 환경적 요인 및 영농방법 등의 영향 정도를 평가하기 위하여 토양흡착실험과 인공강우유출 실험 및 콩 재배 lysimeter 포장에서 유출실험을 수행하였다. Endosulfan의 흡착법에 의한 흡착계수 (K)는 $77{\sim}131$이었으며, 탈착법에 의한K값이 흡착법으로 구한 값보다 높았다. 영국 SSLRC의 이동성 분류기준에 의하면 endosulfan은 Koc 4,000을 초과하여 non-mobile 등급에 속하였다. 인공강우 처리구의 유출수 및 유실토양에 의한 endosulfan의 유실율은 $3.4{\sim}5.6%$$4.4{\sim}15.6%$이었다. 인공강우실험 후 토심별 분포를 살펴 본 결과 대부분의 endosulfan 잔류분은 토심 5 cm 이내에 잔류하였다. 경사도 30%의 경우가 10%에 비하여 각 농약의 유실량이 $0.6{\sim}0.9$배 많았는데 유출수에 의한 농약의 유실량 차이는 유출수 중 농도 차이로 볼 수 있으며, 유실토양에 의한 농약 유실량 차이는 토양 유실량과 관계되는 것으로 생각되었다. Lysimeter 포장유출실험 결과 경사도 및 경사장별 endo-sulfan 유실량은 살포량 대비 $5{\sim}35%$ 수준이었다. 콩재배구의 유실율은 나지구의 유실율에 비하여 평균 66% 수준이었다. 경사조건의 영향을 살펴보면 유출수의 경우에는 그 차이가 크지 않았으나 유실토양에 의한 유실율은 경사도와 경사장 증가에 따라 $4{\sim}12$배까지 증가하는 것으로 나타났다. 한편 유출수 중 농약성분의 최고농도는 콩재배구 및 나지구 각각 $8{\sim}10{\mu}gL^{-1}$$7{\sim}9{\mu}gL^{-1}$ 수준으로 작물 재배 여부에 따른 유출수 중 농도의 차이는 크지 않은 것으로 나타났다.

Silicide-Enhanced Rapid Thermal Annealing을 이용한 다결정 Si 박막의 제조 및 다결정 Si 박막 트랜지스터에의 응용 (Fabrication of Polycrystalline Si Films by Silicide-Enhanced Rapid Thermal Annealing and Their Application to Thin Film Transistors)

  • 김존수;문선홍;양용호;강승모;안병태
    • 한국재료학회지
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    • 제24권9호
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    • pp.443-450
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    • 2014
  • Amorphous (a-Si) films were epitaxially crystallized on a very thin large-grained poly-Si seed layer by a silicide-enhanced rapid thermal annealing (SERTA) process. The poly-Si seed layer contained a small amount of nickel silicide which can enhance crystallization of the upper layer of the a-Si film at lower temperature. A 5-nm thick poly-Si seed layer was then prepared by the crystallization of an a-Si film using the vapor-induced crystallization process in a $NiCl_2$ environment. After removing surface oxide on the seed layer, a 45-nm thick a-Si film was deposited on the poly-Si seed layer by hot-wire chemical vapor deposition at $200^{\circ}C$. The epitaxial crystallization of the top a-Si layer was performed by the rapid thermal annealing (RTA) process at $730^{\circ}C$ for 5 min in Ar as an ambient atmosphere. Considering the needle-like grains as well as the crystallization temperature of the top layer as produced by the SERTA process, it was thought that the top a-Si layer was epitaxially crystallized with the help of $NiSi_2$ precipitates that originated from the poly-Si seed layer. The crystallinity of the SERTA processed poly-Si thin films was better than the other crystallization process, due to the high-temperature RTA process. The Ni concentration in the poly-Si film fabricated by the SERTA process was reduced to $1{\times}10^{18}cm^{-3}$. The maximum field-effect mobility and substrate swing of the p-channel poly-Si thin-film transistors (TFTs) using the poly-Si film prepared by the SERTA process were $85cm^2/V{\cdot}s$ and 1.23 V/decade at $V_{ds}=-3V$, respectively. The off current was little increased under reverse bias from $1.0{\times}10^{-11}$ A. Our results showed that the SERTA process is a promising technology for high quality poly-Si film, which enables the fabrication of high mobility TFTs. In addition, it is expected that poly-Si TFTs with low leakage current can be fabricated with more precise experiments.

비정질 IZTO기반의 투명 박막 트렌지스터 특성 (Characteristics of amorphous IZTO-based transparent thin film transistors)

  • 신한재;이근영;한동철;이도경
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.151-151
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    • 2009
  • Recently, there has been increasing interest in amorphous oxide semiconductors to find alternative materials for an amorphous silicon or organic semiconductor layer as a channel in thin film transistors(TFTs) for transparent electronic devices owing to their high mobility and low photo-sensitivity. The fabriction of amorphous oxide-based TFTs at room temperature on plastic substrates is a key technology to realize transparent flexible electronics. Amorphous oxides allows for controllable conductivity, which permits it to be used both as a transparent semiconductor or conductor, and so to be used both as active and source/drain layers in TFTs. One of the materials that is being responsible for this revolution in the electronics is indium-zinc-tin oxide(IZTO). Since this is relatively new material, it is important to study the properties of room-temperature deposited IZTO thin films and exploration in a possible integration of the material in flexible TFT devices. In this research, we deposited IZTO thin films on polyethylene naphthalate substrate at room temperature by using magnetron sputtering system and investigated their properties. Furthermore, we revealed the fabrication and characteristics of top-gate-type transparent TFTs with IZTO layers, seen in Fig. 1. The experimental results show that by varying the oxygen flow rate during deposition, it can be prepared the IZTO thin films of two-types; One a conductive film that exhibits a resistivity of $2\times10^{-4}$ ohm${\cdot}$cm; the other, semiconductor film with a resistivity of 9 ohm${\cdot}$cm. The TFT devices with IZTO layers are optically transparent in visible region and operate in enhancement mode. The threshold voltage, field effect mobility, on-off current ratio, and sub-threshold slope of the TFT are -0.5 V, $7.2\;cm^2/Vs$, $\sim10^7$ and 0.2 V/decade, respectively. These results will contribute to applications of select TFT to transparent flexible electronics.

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$SiN_x$/고분자 이중층 게이트 유전체를 가진 Zinc 산화물 박막 트랜지스터의 저온 공정에 관한 연구 (Study on the Low-temperature process of zinc oxide thin-film transistors with $SiN_x$/Polymer bilayer gate dielectrics)

  • 이호원;양진우;형건우;박재훈;구자룡;조이식;권상직;김우영;김영관
    • 한국응용과학기술학회지
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    • 제27권2호
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    • pp.137-143
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    • 2010
  • Oxide semiconductors Thin-film transistors are an exemplified one owing to its excellent ambient stability and optical transparency. In particular zinc oxide (ZnO) has been reported because It has stability in air, a high electron mobility, transparency and low light sensitivity, compared to any other materials. For this reasons, ZnO TFTs have been studied actively. Furthermore, we expected that would be satisfy the demands of flexible display in new generation. In order to do that, ZnO TFTs must be fabricated that flexible substrate can sustain operating temperature. So, In this paper we have studied low-temperature process of zinc oxide(ZnO) thin-film transistors (TFTs) based on silicon nitride ($SiN_x$)/cross-linked poly-vinylphenol (C-PVP) as gate dielectric. TFTs based on oxide fabricated by Low-temperature process were similar to electrical characteristics in comparison to conventional TFTs. These results were in comparison to device with $SiN_x$/low-temperature C-PVP or $SiN_x$/conventional C-PVP. The ZnO TFTs fabricated by low-temperature process exhibited a field-effect mobility of $0.205\;cm^2/Vs$, a thresholdvoltage of 13.56 V and an on/off ratio of $5.73{\times}10^6$. As a result, We applied experimental for flexible PET substrate and showed that can be used to ZnO TFTs for flexible application.

$CuGaSe_2$ 단결정 박막 성장과 광전류 특성 (Growth and Photocurrent Properties of $CuGaSe_2$ Single Crystal)

  • K.J. Hong
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2003년도 춘계학술발표강연 및 논문개요집
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    • pp.81-81
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    • 2003
  • The stochiometric mixture of evaporating materials for the CuGaSe$_2$ single crystal thin films were prepared from horizontal furnace. Using extrapolation method of X-ray diffraction patterns for the polycrystal CuGaSe$_2$, it was found tetragonal structure whose lattice constant no and co were 5.615$\AA$ and 11.025$\AA$, respectively. To obtains the single crystal thin films, CuGaSe$_2$ mixed crystal was deposited on throughly etched GaAs(100) by the Hot Wall Epitaxy(HWE) system. The source and substrate temperature were 61$0^{\circ}C$ and 45$0^{\circ}C$ respectively, and the growth rate of the single crystal thin films was about 0.5${\mu}{\textrm}{m}$/h. The crystalline structure of single crystal thin films was investigated by the double crystal X-ray diffraction(DCXD). Hall effect on this sample was measured by the method of van der pauw and studied on carrier density and mobility depending on temperature. From Hall data, the mobility was likely to be decreased by pizoelectric scattering in the temperature range 30K to 150K and by polar optical scattering in the temperature range 150K to 293K. The optical energy gaps were found to be 1.68eV for CuGaSe$_2$ single crystal thin films at room temperature. The temperature dependence of the photocurrent peak energy is well explained by the Varshni equation then the constants in the Varshni equation are given by a=9.615$\times$ 10$^{-4}$ eV/K, and $\beta$=335K. From the photocurrent spectra by illumination of polarized light of the CuGaSe$_2$ single crystal thin films. We have found that values of spin orbit coupling ΔSo and crystal field splitting ΔCr was 0.0900eV and 0.2498eV, respectively. From the PL spectra at 20K, the peaks corresponding to free bound excitons and D-A pair and a broad emission band due to SA is identified. The binding energy of the free excitons are determined to be 0.0626eV and the dissipation energy of the acceptor-bound exciton and donor-bound exciton to be 0.0352eV, 0.0932eV, respectively.

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연속관입형 소형콘관입시험기에 대한 크기효과 및 현장적용 (Scale Effects and Field Applications for Continuous Intrusion Miniature Cone Penetrometer)

  • 윤성수;김규선;이진형;신동현
    • 대한토목학회논문집
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    • 제33권6호
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    • pp.2359-2368
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    • 2013
  • 콘관입시험은 현장조사 시험법으로 사용 빈도가 증가되고 있다. 그러나 콘관입시험은 콘크기와 용량 등에 따라 적용 가능한 현장조건이 제한되는 단점이 있다. 소형콘의 감소된 단면적은 시스템 용량을 증대시켜 적용성을 향상시킬 수 있으며, 코일식 롯드를 이용한 연속관입 시스템은 신속하고 경제적인 지반조사를 가능하게 한다. 본 연구에서는 국내 여러 현장에서 연속관입형 소형콘관입시험 시스템의 성능을 표준 콘관입시험 시스템과의 비교시험을 통하여 평가하였다. 소형콘관입시험 장비는 기존의 표준콘관입시험 장비와 비교하여 지반정수 도출 및 지반분류에 동일한 성능을 발휘하는 것을 확인하였으며, 장비의 기동성 및 적용대상 토질 확대 등의 장점을 나타내는 것으로 평가되었다. 크기효과 검증을 위한 현장시험 결과 기존 시험 방법에 비해 콘저항력의 경우는 약 10% 과대평가하는 것으로 나타났다. 차량 형태의 조사장비는 표층이 연약하거나 진입이 어려운 경우에는 조사의 한계가 있으므로, 궤도장치에 탑재된 연속관입형 소형콘관입시험 시스템으로 개선하여 적용성을 확대시켰다. 따라서 개선된 연속관입형 소형콘관입시험 시스템은 연약지반 심도탐지 및 흙분류시 경제적이고 신뢰성 높은 지반조사 방법으로 활용할 수 있다.

Bridgman법에 의한 $Cdln_2Te_4$단결정의 성장과 가전자대 갈라짐에 대한 광전류 연구 (Photocurrent study on the splitting of the valence band and growth of $Cdln_2Te_4$ single crystal by Bridgman method)

  • 홍광준;이관교;이봉주;박진성;신동찬
    • 한국결정성장학회지
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    • 제13권3호
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    • pp.132-138
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    • 2003
  • 수평 전기로에서 $CdIn_2Te_4$ 다결정을 용응법으로 합성하고 Bridgman법으로 tetragonal structure의 $CdIn_2Te_4$ 단견정을 성장시켰다. c축에 수직한 시료의 광흡수와 광전류 spectra를 293k에서 10K까지 측정하였다. Hall효과는 van der Pauw 방법에 의해 측정되었으며, 온도에 의존하는 운반자 농도와 이동도는 293 K에서 각각 $8.61\times 10^{16}\textrm{cm}^3,\;242\textrm{cm}^$V .s였다. $CdIn_2Te_4$ 단결정의 광흡수와 광전류 spectra를 293k에서 10K까지 측정하였다. 광흡수 스펙트럼으로부터 band gap $E_g$(T)는 Varshni 공식에 따라 계산한 결과 $1.4750ev - (7.69\times10^{-3})\; ev/k)\;T^2$/(T + 2147k)이었다. 광전류 스펙트럼으로부터 Hamilton matrix(Hopfield quasicubic mode)법으로 계산한 결과 crystal field splitting Δcr값이 0.2704 eV이며 spin-orbit $\Delta$so값은 0.1465 eV임을 확인하였다. 10K일 때 광전류 봉우리들은 n : 1일때 $A_\;{1-} B_\;{1-}$$C_\;{1-}$-exciton봉우리임을 알았다

Channel and Gate Workfunction-Engineered CNTFETs for Low-Power and High-Speed Logic and Memory Applications

  • Wang, Wei;Xu, Hongsong;Huang, Zhicheng;Zhang, Lu;Wang, Huan;Jiang, Sitao;Xu, Min;Gao, Jian
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권1호
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    • pp.91-105
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    • 2016
  • Carbon Nanotube Field-Effect Transistors (CNTFETs) have been studied as candidates for post Si CMOS owing to the better electrostatic control and high mobility. To enhance the immunity against short - channel effects (SCEs), the novel channel and gate engineered architectures have been proposed to improve CNTFETs performance. This work presents a comprehensive study of the influence of channel and gate engineering on the CNTFET switching, high frequency and circuit level performance of carbon nanotube field-effect transistors (CNTFETs). At device level, the effects of channel and gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. This model is based on two-dimensional non-equilibrium Green's functions (NEGF) solved self - consistently with Poisson's equations. It is revealed that hetero - material - gate and lightly doped drain and source CNTFET (HMG - LDDS - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, improve the switching speed, and is more suitable for use in low power, high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the impact of the channel and gate engineering on basic digital circuits (inverter, static random access memory cell) have been investigated systematically. The performance parameters of circuits have been calculated and the optimum metal gate workfunction combinations of ${\Phi}_{M1}/{\Phi}_{M2}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product (PDP). In addition, we discuss and compare the CNTFET-based circuit designs of various logic gates, including ternary and binary logic. Simulation results indicate that LDDS - HMG - CNTFET circuits with ternary logic gate design have significantly better performance in comparison with other structures.

Ge 기판 위에 HfO2 게이트 산화물의 원자층 증착 중 In Situ 질소 혼입에 의한 전기적 특성 변화 (Improved Electrical Properties by In Situ Nitrogen Incorporation during Atomic Layer Deposition of HfO2 on Ge Substrate)

  • 김우희;김범수;김형준
    • 한국진공학회지
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    • 제19권1호
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    • pp.14-21
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    • 2010
  • Ge은 Si에 비하여 높은 이동도를 갖기 때문에 차세대 고속 metal oxide semiconductor field effect transistors (MOSFETs) 소자를 위한 channel 물질로서 각광받고 있다. 그러나 화학적으로 안정한 게이트 산화막의 부재는 MOS 소자에 Ge channel의 사용에 주요한 장애가 되어왔다. 특히, Ge 기판 위에 고품질의 계면 특성을 갖는 게이트 절연막의 제조는 필수 요구사항이다. 본 연구에서, $HfO_xN_y$ 박막은 Ge 기판 위에 플라즈마 원자층 증착법(plasma-enhanced atomic layer deposition, PEALD)을 이용하여 증착되었다. 플라즈마 원자층 증착공정 동안에 질소는 질소, 산소 혼합 플라즈마를 이용한 in situ 질화법에 의하여 첨가되었다. 산소 플라즈마에 대한 질소 플라즈마의 첨가로 성분비를 조절함으로써 전기적 특성과 계면 성질을 향상시키는데 초점을 맞추어서 연구를 진행하였다. 질소 산소의 비가 1:1이었을 때, EOT의 값의 10% 감소를 갖는 고품질의 소자특성을 보여주었다. X-ray photoemission spectroscopy (XPS)와 high resolution transmission electron microscopy (HR-TEM)를 사용하여 박막의 화학적 결합 구조와 미세구조를 분석하였다.