• Journal of the Chungcheong Mathematical Society
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• v.23 no.3
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• pp.571-588
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• 2010

We introduce the Landau-de Gennes model in order to understand molecular structures in ferroelectric liquid crystals. We investigate equilibrium configurations of the governing energy functional by means of bifurcation analysis. In particular, we obtain periodic solutions of the functional, which is a signature of a rich variety of applications of ferroelectric materials.

• Journal of information and communication convergence engineering
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• v.2 no.2
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• pp.93-96
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• 2004

The a-Si:H TFT using ferroelectric of $SrTiO_3$ as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric are superior to $SiO_2$ and $Si_{3}N_{4}$. Ferroelectric increases on-current, decreases threshold voltage of TFT and also improves breakdown characteristics. The a-SiN:H has optical band gap of 2.61 eV, retractive index of 1.8∼2.0 and resistivity of $10^{13}$~$10^{15}$ $\Omega$cm, respectively. Insulating characteristics of ferroelectrics are excellent because dielectric constant of ferroelectric is about 60∼100 and breakdown strength is over 1MV/cm. TFT using ferroelectric has channel length of 8∼20 $\mu\textrm{m}$ and channel width of 80∼200 $\mu\textrm{m}$. And it shows that drain current is 3.4$\mu\textrm{A}$ at 20 gate voltage, $I_{on}$/$I_{off}$ is a ratio of $10^5$~$10^8$ and $V_{th}$ is 4∼5 volts, respectively. In the case of TFT without ferroelectric, it indicates that the drain current is 1.5 $\mu\textrm{A}$ at 20 gate voltage and $V_{th}$ is 5∼6 volts. With the improvement of the ferroelectric thin film properties, the performance of TFT using this ferroelectric has advanced as a gate insulator fabrication technology is realized.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.174-174
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• 2008

Non-volatile memories using ferroelectric-gate field-effect transistors (Fe-FETs) with a metal/ferroelectric/semiconductor gate stack (MFS-FETs) make non-destructive read operation possible. In addition, they also have features such as high switching speed, non-volatility, radiation tolerance, and high density. However, the interface reaction between ferroelectric materials and Si substrates, i.e. generation of mobile ions and short retention, make it difficult to obtain a good ferroelectric/Si interface in an MFS-FET's gate. To overcome these difficulties, Fe-FETs with a metal/ferroelectric/insulator/semiconductor gate stack (MFIS-FETs) have been proposed, where insulator as a buffer layer is inserted between ferroelectric materials and Si substrates. We prepared $SrBi_2Ta_2O_9$ (SBT) film as a ferroelectric layer and $LaZrO_x$ (LZO) film as a buffer layer on p-type (100) silicon wafer for making the MFIS-FET devices. For definition of source and drain region, phosphosilicate glass (PSG) thin film was used as a doping source of phosphorus (P). Ultimately, the n-channel ferroelectric-gate FET using the SBT/LZO/Si Structure is fabricated. To examine the ferroelectric effect of the fabricated Fe-FETs, drain current ($I_d$) versus gate voltage ($V_g$) characteristics in logarithmic scale was measured. Also, drain current ($I_d$) versus drain voltage ($V_d$) characteristics of the fabricated SBT/LZO/Si MFIS-FETs was measured according to the gate voltage variation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.05a
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• pp.696-699
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• 2003

In this study, we suggested the model to precisely evaluate the ferroelectric hysteresis loop, using the modified Sawyer-Tower circuit and the ferroelectric capacitor with a MDFM(Metal-Dielectric-ferroelectric-Metal) structure. The mathematical expression of dipole polarization is applied to the numerical integration algorithm, and the fatigue property can be considered including the dielectric layer between ferroelectrics and bottom electrode. The validity of our model is proved comparing the estimated value of our model and the measured results of PLT(10) thin film.

• Journal of the Korean Ceramic Society
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• v.41 no.4
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• pp.273-276
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• 2004

Report ferroelectric memories based on 0.35$\mu\textrm{m}$ CMOS technology ensuring ten-year retention and imprint at 175$^{\circ}C$. This excellent reliability resulted from newly developed BT-based ferroelectric films with superior reliability performance at high temperatures, and also resulted from robust integration schemes free from ferroelectric degradation due to process impurities such as moisture and hydrogen. The superior reliabilities at high temperature of ferroelectric memories using BT-based films are due to the random orientation by special bake treatments.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1506-1508
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• 2001

We have investigated for the modeling and the simulation of the ferroelectric capacitor and MFS TFT (Metal-Ferroelectric-Semiconductor Thin Film transistor). For ferroelectric capacitor modeling, we adopted the equivalent circuit model which consists of a nonlear capacitor, a nonliner resistor, and a linear capacitor. MFS TFT have been modeled by combining the ferroelectric capacitor and Bsim3 MOSFET model. Our simulations show the characteristics of ferroelectric capacitor and MFS TFT.

• Journal of the Korean Ceramic Society
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• v.35 no.7
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• pp.665-670
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• 1998

Ferroelectric anomaly in PbO-{{{{ { {B }_{2 }O }_{3 } }}-{{{{ {TiO }_{3 } }}-BaO glasses which is observed in DAT measurements was in-vestigated together with the effect of BaO content on the shift of Cuire temperature. The temperature where the ferroelectric anomaly apperars on cooling in DTA decreased in proportion with increasing BaO content,. For as-crystallized samples the ferroelectric anomaly was not observed on heating but on cooling whilist for powder samples leached chemically from the crystallized samples both endothermic and ex-otehrmic peaks were observed. This fact suggests that the appearance of the ferroelectric anomaly in DAT largely depends on glassy phases surrounding individual {{{{ {PbTiO }_{3 } }} crystals rather than effects of grain size and crystallinity.

• Journal of the Chungcheong Mathematical Society
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• v.27 no.4
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• pp.771-777
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• 2014

In this paper, we study ferroelectric configurations of liquid crystals by nonlocal interaction energy associated with the polarization.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.6
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• pp.523-546
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• 2022

Morphotropic phase boundary (MPB), which is a special boundary that separates two or multiple different phases in the phase diagram of some ferroelectric ceramics, is an important concept in identifying physics that includes piezoelectric responses. MPB, which had not been discovered in organic materials until recently, was discovered in poly(vinylidene fluoride-co-trifluoroethylene (P(VDF-TrFE)), resulting from a molecular approach. The piezoelectric coefficient of P(VDF-TrFE) in this MPB region was achieved up to -63.5 pC N^-1, which is about two times as large as the conventional value of -30 pC N^-1 of P(VDF-TrFE). An order-disorder arrangement greatly affects the rise of the piezoelectric effect and the ferroelectric, paraelectric and relaxor ferroelectric of P(VDF-TrFE), so the arrangement and shape of the polymer chain is important. In this review, we investigate the origin of negative longitudinal piezoelectric coefficients of piezoelectric polymers, which is definitely opposite to those of common piezoelectric ceramics. In addition to the mainly discussed issue about MPB behaviors of ferroelectric polymers, we also introduce the consideration about polymer chirality resulting in relaxor ferroelectric properties. When the physics of ferroelectric polymers is unveiled, we can improve the piezoelectric and pyroelectric properties of ferroelectric polymers and contribute to the development of next-generation sensor, energy, transducer and actuator applications.

• Journal of IKEEE
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• v.27 no.4
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• pp.399-404
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• 2023

In this paper, we analyzed the current path in the O/N/O (Oxide/Nitride/Oxide) structure of 3D NAND Flash memory and in the O/N/F (Oxide/Nitride/Ferroelectric) structure where the blocking oxide is replaced by a ferroelectric. In the O/N/O structure, when V_read is applied, a current path is formed on the backside of the channel due to the E-fields of neighboring cells. In contrast, the O/N/F structure exhibits a current path formed on the front side due to the polarization of the ferroelectric material, causing electrons to move toward the channel front. Additionally, we performed an examination of device characteristics considering channel thickness and channel length. The analysis results showed that the front electron current density in the O/N/F structure increased by 2.8 times compared to the O/N/O structure, and the front electron current density ratio of the O/N/F structure was 17.7% higher. Therefore, the front current path is formed more effectively in the O/N/F structure than in the O/N/O structure.