• 한국산업정보학회논문지
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• 제17권7호
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• pp.17-24
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• 2012

애드혹 네트워크에서는 제한된 자원과 전력을 가지고 있기 때문에 에너지 효율적인 데이터 집계 연산이 필요하다. 현재 데이터 집계 연산에 대한 연구는 활발히 진행되고 있지만 기존의 연구에서는 노드의 밀집도를 고려하지 못하였다. 노드가 특정 영역에 밀집 되어 배치된다면 그 영역에 배치된 센서 노드들이 센싱 하는 정보는 그 연관성이 아주 강하다고 판단할 수 있다. 이는 중복된 데이터를 수집하는 효과와 같다고 볼 수 있으며, 이 정보를 전송하는데 소모되는 에너지는 낭비된다고 볼 수 있다. 제안하는 기법에서는 AMC알고리즘을 이용한 다중홉 클러스터링 환경에서 노드들이 밀집되어 있는 지역을 핫스팟 영역으로 지정하여 해당 지역에서 대표노드를 선정한다. 만약 데이터집계의뢰 메시지를 전송받으면, 주변의 노드를 대표하여 대표노드가 해당 환경 정보를 관리자에게 제공하여 중복되는 센싱 정보를 줄여 네트워크 수명을 증가시킬수 있도록 설계하였다.

• 한국산업정보학회논문지
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• 제11권2호
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• pp.48-62
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• 2006

최근 분산 컴퓨팅과 임베디드 시스템을 위한 응용 영역이 급성장하고 무선 통신 기술과 컴퓨터 하드웨어의 발전으로 매우 작은 크기의 센서 노드로 이루어진 센서 네트워크를 구성하는 것이 가능해졌다. 하지만 센서 네트워크의 특징 때문에 기존 라우팅 프로토콜을 적용하기 어렵다. 본 논문에서는 센서 네트워크의 특징을 고려하여 에너지 효율적으로 동작할 수 있는 알고리즘을 제안한다. 먼저 센서 노드가 관찰한 데이터를 싱크로 전송할 때 센서 노드의 에너지의 상태를 고려한 라우팅 프로토콜을 제안한다. 둘째, 센서 노드의 상대 위치를 측정하여 인접 노드를 휴지 상태로 전환시켜 에너지 소모를 줄이는 기법을 제안한다. 센서 노드의 에너지 상태와 위치정보를 주기적으로 재설정하여 센서 네트워크의 서비스 시간을 향상시킨다. 제안하는 기법은 트리기반 라우팅 프로토콜에 비해 경로 유지 시간이 2배 이상 향상되고, 평균 에너지 소모율이 약 30% 줄어든다.

• 한국태양에너지학회 논문집
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• 제22권3호
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• pp.47-56
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• 2002

The office is an excellent candidate for implementing daylighting techniques because of the relatively high electric lighting power densities and long daytime use pattern. The quantity of light available for a space can be translated in term of the amount of energy savings through a process of a building energy simulation. To get significant energy savings in general illumination, the electric lighting system must be incorporated with a daylight - activated dimmer control. A prototype configuration of an office interior has been established and the integration between the building envelope and lighting and HVAC systems is evaluated based on computer modeling of a lighting control facility. First of all, an energy-efficient luminaire system is designed for both a totally open-plan office interior and a partitioned office. A lighting design and analysis program, Lumen-Micro 2000 predicts the optimal layout of a conventional fluorescent lighting fixture to meet the designed lighting level and calculates unit power density, which translates the demanded amount of electric lighting energy. A dimming control system integrated with the contribution of daylighting has been applied to the operating of the artificial lighting. Annual cooling load due to lighting and the projecting saving amount of cooling load due to daylighting under overcast diffuse sky are evaluated by a computer software, ENER-Win. In brief, the results from building energy simulation with measured daylight illumination levels and the performance of lighting control system indicate that daylighting can save over 70 percent of the required energy for general illumination in the perimeter zones through the year. A 25 % of electric energy for cooling may be saved by dimming and turning off the luminaires in the perimeter zones.

• ETRI Journal
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• 제43권4호
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• pp.717-727
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• 2021

In this study, new multiplier and adder method designs with multiplexers are proposed. The designs are based on quaternary logic and a carbon nanotube field-effect transistor (CNTFET). The design utilizes 4 × 4 multiplier blocks. Applying specific rotational functions and unary operators to the quaternary logic reduced the power delay produced (PDP) circuit by 54% and 17.5% in the CNTFETs used in the adder block and by 98.4% and 43.62% in the transistors in the multiplier block, respectively. The proposed 4 × 4 multiplier also reduced the occupied area by 66.05% and increased the speed circuit by 55.59%. The proposed designs are simulated using HSPICE software and 32 nm technology in the Stanford Compact SPICE model for CNTFETs. The simulated results display a significant improvement in the fabrication, average power consumption, speed, and PDP compared to the current bestperforming techniques in the literature. The proposed operators and circuits are evaluated under various operating conditions, and the results demonstrate the stability of the proposed circuits.

• Structural Engineering and Mechanics
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• 제81권5호
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• pp.633-645
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• 2022

The active tuned mass damper (ATMD) is an efficient and reliable structural control system for mitigating the dynamic response of structures. The inertial force that an ATMD exerts on a structure to attenuate its otherwise large kinetic energy and undesirable vibrations and displacements is proportional to its excursion. Achieving a balance between the inertial force and excursion requires a control law or feedback mechanism. This study presents a technique for the optimum design of a sliding mode controller (SMC) as the control law for ATMD-equipped structures subjected to earthquakes. The technique includes optimizing an SMC under an artificial earthquake followed by testing its performance under real earthquakes. The SMC of a real 11-story shear building is optimized to demonstrate the technique, and its performance in mitigating the displacements of the building under benchmark near- and far-fault earthquakes is compared against that of a few other techniques (proportional-integral-derivative [PID], linear-quadratic regulator [LQR], and fuzzy logic control [FLC]). Results indicate that the optimum SMC outperforms PID and LQR and exhibits performance comparable to that of FLC in reducing displacements.

• International Journal of Naval Architecture and Ocean Engineering
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• 제11권2호
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• pp.939-951
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• 2019

A novel empirical mode decomposition strategy based on Fourier transform and band-pass filter techniques, contributing to efficient instantaneous vibration analyses, is developed in this study. Two key improvements are proposed. The first is associated with the adoption of a band-pass filter technique for intrinsic mode function sifting. The primary characteristic of decomposed components is that their bandwidths do not overlap in the frequency domain. The second improvement concerns an attempt to design narrowband constraints as the essential requirements for intrinsic mode function to make it physically meaningful. Because all decomposed components are generated with respect to their intrinsic narrow bandwidth and strict sifting from high to low frequencies successively, they are orthogonal to each other and are thus suitable for an instantaneous frequency analysis. The direct Hilbert spectrum is employed to illustrate the instantaneous time-frequency-energy distribution. Commendable agreement between the illustrations of the proposed direct Hilbert spectrum and the traditional Fourier spectrum was observed. This method provides robust identifications of vibration modes embedded in vibration processes, deemed to be an efficient means to obtain valuable instantaneous information.

• 대한전자공학회논문지SD
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• 제43권2호
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• pp.42-50
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• 2006

반도체 공정기술의 발달로 인해 칩의 집적도가 향상되고 높은 성능의 SoC (System On a Chip)의 구현이 가능해졌다. 하지만 이로 인한 칩의 전력 소모량 증가는 칩 설계시의 중요 제한 요소가 되고 있다 칩 설계의 하위 단계로 갈수록 설계의 수정은 시간과 금전적 비용을 기하급수적으로 증가시키기 때문에, 설계의 상위 단계에서부터 칩의 소모 전력을 미리 추정하는 기술은 필수적이다. 이에 본 연구에서는 효율적인 상위 레벨 소모 전력 추정을 위해 회로를 레벨화 하고, 일부 레벨의 스위칭을 기반으로 회로의 소모 전력을 look up 테이블을 이용하여 모델링하였다 제안한 기술을 이용하여 ISCAS'85 벤치마크 회로에 대해 평균 소모 전력을 추정한 결과, 기존에 알려진 소모 전력 추정 기술에 비해 평균 추정 오차를 $9.45\%$에서 $3.84\%$로 크게 개선한 결과를 얻을 수 있었다.

• 한국해양공학회:학술대회논문집
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• 한국해양공학회 2003년도 춘계학술대회 논문집
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• pp.109-114
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• 2003

Wireless communication systems are inevitable for efficient underwater activities. Because of the poor propagation characteristics of light and electromagnetic waves, acoustic waves are generally used for the underwater wireless communication. Although there are many kinds of information type, visual images take an essential role especially for search and identification activities. For this reason, we developed an acoustic-based underwater image transmission system under a dual use technology project supported by MOCIE (Ministry of Commerce, Industry and Energy). For the application to complicated and time-varying underwater environments all-digital transmitter and receiver systems are investigated. Array acoustic transducers are used at the receiver, which have the center frequency of 32kHz and the bandwidth of 4kHz. To improve transmission speed and quality, various algorithms and systems are used. The system design techniques will be discussed in detail including image compression/ decompression system, adaptive beam- forming, fast RLS adaptive equalizer, ${\partial}/4$ QPSK (Quadrilateral Phase Shift Keying) modulator/demodulator, and convolution coding/ Viterbi. Decoding.

• 한국정보과학회논문지:시스템및이론
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• 제32권2호
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• pp.85-94
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• 2005

DRAM에 의해 지원되는 페이지(page) 접근 모드나 버스트(burst) 접근 모드를 신중하게 이용하면 DRAM의 접근 시간(access latency) 및 접근 시에 소모되는 에너지를 줄일 수 있음이 많은 설계들에서 입증되었다. 최근에는 변수들을 메모리에 적절하게 배열함으로써 페이지 접근 횟수와 버스트 접근 회수론 각각 극대화시킬 수 있음이 밝혀졌다. 그러나 이러한 최적화문제는 쉽게 최적의 해를 구할 수 없다고 알려졌기 때문에. 주로 간단한 greedy 휴리스틱을 이용해서 풀려졌다. 본 논문은 기존의 방법보다 더 좋은 결과를 얻기 위해서 0-1 선형 프로그래밍(ILP)을 근간으로 한 기법을 제안한다. 벤치마크 프로그램들을 이용한 실험 결과를 보면, 제안된 알고리즘은 각각 OFU(order of first use) 방식과, [2]의 방식, [3]의 방식에 비해 평균적으로 각각 32.3%, 15.1%, 3.5%만큼 페이지 접근 회수론 증가시켰으며, 또한 각각84.4%, 113.5%, 10.1%만큼의 버스트 접근 회수를 증가시켰다.

• KEPCO Journal on Electric Power and Energy
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• 제3권2호
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• pp.89-97
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• 2017

The substation is a critical node in the power network where power is transformed in the power generation, transmission and distribution system. The IEC 61850 is a global standard which proposes efficient substation automation by defining interoperable communication and data modelling techniques. In order to achieve this level of interoperability and automation, the IEC 61850 (Part 6) defines System Configuration description Language (SCL). The SCL is an XML based file format for defining the abstract model of primary and secondary substation equipment, communications systems and also the relationship between them. It enables the interoperable exchange of data during substation engineering by standardizing the description of applications at different stages of the engineering process. To achieve the seamless interoperability, multi-vendor devices are required to adhere completely to the IEC 61850. This paper proposes an efficient algorithm required for verifying the interoperability of multi-vendor devices by checking the adherence of the SCL file to specifications of the standard. Our proposed SCL validation algorithm consists of schema validation and other functionalities including information model validation using UML data model, the Vendor Defined Extension model validation, the User Defined Rule validation and the IED Engineering Table (IET) consistency validation. It also integrates the standard UCAIUG (Utility Communication Architecture International Users Group) Procedure validation for quality assurance testing. Our proposed algorithm is not only flexible and efficient in terms of ensuring interoperable functionality of tested devices, it is also convenient for use by system integrators and test engineers.