• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.44 no.12
• /
• pp.61-70
• /
• 2007

The density of Memory has been increased by great challenge for memory technology. Therefore, elements of memory become more smaller than before and the sensitivity to faults increases. As a result of these changes, memory testing becomes more complex. In addition, as the number of storage elements per chip increases, the test cost becomes more remarkable as the cost per transistor drops. Recent development in system-on-chip (SOC) technology makes it possible to incorporate large embedded memories into a chip. However, it also complicates the test process, since usually the embedded memories cannot be controlled from the external environment. Proposed design doesn't need controls from outside environment, because it integrates into memory. In general, there are a variety of memory modules in SOC, and it is not possible to test all of them with a single algorithm. Thus, the proposed scheme supports the various memory testing process. Moreover, it is able to At-Speed test in a memory module. consequently, the proposed is more efficient in terms of test cost and test data to be applied.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.41 no.9
• /
• pp.97-106
• /
• 2004

A new test strategy for embedded SOC test is proposed. The SOC test is evaluated by the degree that is the amount of the total reduced test time. Since the test time for a embedded core is determined by the configuration of test wrapper, the total test time is decided by the length of the largest TAM used by the test wrapper. So the DFT(Design for Test) must be involved in the design flow. And the efficient test strategy must be settled. The all Previous test strategies are the methods that find a sub-optimal configurations of scan-chains to minimize the test time after the total TAM lines are divided into a few groups. But this is the NP-complete problem so that all attempts which examine such a TAM configuration and scan-chain division are impossible. In this thesis, a new methodology for this problem is proposed and the efficiency of the methodology is proved.

• Journal of Welding and Joining
• /
• v.31 no.3
• /
• pp.84-88
• /
• 2013

These days embedded technology may be the most significant development in the electronics industry. The study focused on the development of active device embedding using flexible printed circuit in view of process and materials. The authors fabricated 30um thickness Si chip without any crack, chipping defects with a dicing before grinding process. In order to embed chips into flexible PCB, the chip pads on a chip are connected to bonding pad on flexible PCB using an ACF film. After packaging, all sample were tested by the O/S test and carried out the reliability test. All samples passed environmental reliability test. In the future, this technology will be applied to the wearable electronics and flexible display in the variety of electronics product.

• KIPS Transactions on Software and Data Engineering
• /
• v.6 no.8
• /
• pp.401-410
• /
• 2017

This paper proposes a method to generate test cases in an automatic manner, based on checklist containing test cases used for testing embedded systems. In general, the items to be tested are defined in a checklist. However, most test case generation strategies recommend to test a system with not only the defined test items but also various mutated test conditions. The proposed method parses checklist in Korean file and figures out the system inputs and outputs, and operation information. With the found information and the user defined test case generation strategy, the test cases are automatically generated. With the proposed method, the errors introduced during manual test case generation may be reduced and various test cases not defined in checklist can be generated. The proposed method is implemented and the experiment is performed with the checklist for an medical embedded system. The feasibility of the proposed method is shown through the test cases generated from the checklist. The test cases are adequate to the coverages and their statistics are correct.

• 제어로봇시스템학회:학술대회논문집
• /
• 2004.08a
• /
• pp.413-416
• /
• 2004

The tracking antenna system must be always pointed to a satellite for data link among moving vehicles. Especially, for an antenna mounted on a moving vehicle, it needs the stabilized the antenna system. So, software and hardware, signal processing of motion detection sensors, real-time processing of vehicle dynamics, trajectory estimation of satellite, antenna servo mechanism, and tracking algorithm, are unified in the antenna system. The purpose of this paper is to design the embedded tracking antenna control system for satellite communication. The embedded OS(Operating System) based stabilization and tracking algorithm was implemented. The performance of the designed embedded control system was verified by the real satellite communication test.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2001.05a
• /
• pp.700-705
• /
• 2001

IEEE1394 is a new interface standard for connecting peripheral devices to embedded linux system. A IEEE1394 system consists of a embedded Linux system and a number of peripherals with IEEE1394 interfaces. In this paper, we Embedded Linux System for IEEE-1394 Realization described with IEEE1394 interface. Using hardware used board on MPC860 processor, Linux kernel used kernel 2.2.14 for a stabilization version, Hardware Interface inspected a test and quality improvement On board with IEEE1394 Application.

• IEMEK Journal of Embedded Systems and Applications
• /
• v.9 no.3
• /
• pp.165-171
• /
• 2014

In this paper, we propose the hardware and software of a test-bed of a hovering AUV (autonomous underwater vehicle). Test-bed to develop as the underwater robot for the hovering -type is planning to apply for marine resource development and exploration for deep sea. The RTU that controls a azimuth thruster and a vertical thruster of test-bed is a intergrated-type thruster. The main control unit that collects sensor's data and performs high-speed processing and controls a movement of test-bed is a underwater hybrid navigation system. Also it transfers position, posture, state information of test-bed to the host PC of user using a wireless communication. The host PC checks a test-bed in real time by using a realtime monitoring system that is implemented by LabVIEW.

• KIPS Transactions on Software and Data Engineering
• /
• v.3 no.6
• /
• pp.201-214
• /
• 2014

In this paper, we propose a test case generation method adequate to destructive test of the BLDC(Brush Less Direct Current) motor controller used for the MDPS(Motor Driven Power Steering) system embedded in an automobile. The proposed method is a modified CTM(Classification Tree Method). CTM generates test cases assuming that all inputs are equally important. Therefore, it is very hard to generate test cases for extreme situations. To overcome the drawback and generate test cases specialized for destructive test. a modified CTM that compensates the limitation of traditional CTM is proposed. The proposed method has an advantage that it can intensively generate the test scenarios adequate to extreme situations by combining the test cases generated by the transitional CTM the while keeping the merit of the traditional CTM. The test scenarios for destructive test for the MDPS system embedded in a commercial automobile are generated utilizing the proposed method. The effectiveness of the proposed algorithm is verified through the test.

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.41 no.4
• /
• pp.41-49
• /
• 2004

In this paper, a design and measurement method for FPGA embedded gigabit-transceiver is presented. Altera's Stratix GX device which is general purpose transceiver called GXB was used for implementing PCI Express transceiver. PCI Express is the generation high performance serial I/O bus used to interconnect peripheral devices. After GXB was set follow by PCI Express specifications, the design has been verified by timing simulation and implemented as hardware. We tested it as follow. First GXB internal digital and analog block test second GXB transmitter signal integrity test called Eye mask test, third GXB high-speed serial I/O buffer and on-chip termination test and the last GXB protocol test. This paper shows all the design and measurement procedure about FPGA embedded gigabit-transceiver.

• KIPS Transactions on Software and Data Engineering
• /
• v.5 no.12
• /
• pp.641-652
• /
• 2016

This paper proposes a method to generate test scripts in an automatic manner, based on checklist used for testing embedded systems in the fields. The proposed method can reduce the mistakes which may be introduced during manual generation. In addition, it can generate test scripts to test various mode combinations, which is not possible to be tested by the typical checklist. The test commands in a checklist are transformed into a test script suit referencing the signal values defined in a test command dictionary. In addition, the method to generate test scripts in sequential, double permutation and random manners is proposed useful to test the inter-operations between modes, a series of operations for a specific behavior. The proposed method is implemented and the feasibility is shown through the experiments.