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Programmable Memory BIST for Embedded Memory  

Hong, Won-Gi (Department of Computer, Soongsil University)
Chang, Hoon (Department of Computer, Soongsil University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.44, no.12, 2007 , pp. 61-70 More about this Journal
Abstract
The density of Memory has been increased by great challenge for memory technology. Therefore, elements of memory become more smaller than before and the sensitivity to faults increases. As a result of these changes, memory testing becomes more complex. In addition, as the number of storage elements per chip increases, the test cost becomes more remarkable as the cost per transistor drops. Recent development in system-on-chip (SOC) technology makes it possible to incorporate large embedded memories into a chip. However, it also complicates the test process, since usually the embedded memories cannot be controlled from the external environment. Proposed design doesn't need controls from outside environment, because it integrates into memory. In general, there are a variety of memory modules in SOC, and it is not possible to test all of them with a single algorithm. Thus, the proposed scheme supports the various memory testing process. Moreover, it is able to At-Speed test in a memory module. consequently, the proposed is more efficient in terms of test cost and test data to be applied.
Keywords
Memory; BIST; Programmable BIST; Embedded Memory;
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