• 마이크로전자및패키징학회지
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• 제24권1호
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• pp.1-8
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• 2017

Fe-9.8Si-6.0Al mother alloy was manufactured using by Fe-3.5Si recycled scrap and Si powder. And then, soft magnetic alloy powder of $D_{50}$ size and sphere type were prepared by gas atomization process. To obtain the soft magnetic powder of a high aspect ratio, in the first, we conducted the ball milling process for 8 hours. And heat treatment was performed under $650^{\circ}C$, 2 hours and $N_2$ atmosphere condition for reducing the residual stress of the powder. Based on these process, we made around $50{\mu}m$ diameter Fe-9.8Si-6.0Al powder, which morphology and shape was a similar to the commercial Fe-Si-Al powder. Finally, the soft magnetic sheets were prepared by tape casting process using by those powders. The permeability of the tape casting sheet was measured, and we confirmed the possibility of reusing to the soft magnetic materials of Fe-Si electric sheet scrap.

• 마이크로전자및패키징학회지
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• 제19권1호
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• pp.9-16
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• 2012

Currently due to increasing integration of various electronic devices and need of multi-functions, more and more heat is produced and for electronic devices to achieve maximum performance with optimum life time, heat dissipation is critical. A solution to such problems is use of high heat dissipative insulating sheet. In this paper status of current products are introduced and several technology aspects to meet the demand of increased heat dissipation needs is introduced.

• 마이크로전자및패키징학회지
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• 제18권2호
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• pp.1-9
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• 2011

Rare metals, called as vitamins of industry, are defined as the elements which are very few in the earth and are difficult to extract from ores. The requirements for total amounts of rare metals have increased as the global economics grows and the function of electronic components varies considerably. The rare metals have been maldistributed to America, CIS(Commonwealth of Independent States), China, Australia, Canada as about 80% of total natural resources, which also lead to unequal materials flow or distribution. Therefore, it was needed to investigate the feature of rare metals in terms of industry as well as technology. We could identify the industrial issues associated with the supply of critical rare elements in electronic components.

• ETRI Journal
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• 제33권4호
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• pp.645-647
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• 2011

In this study, a microcapillary pumped loop (MCPL) that can be used as a cooling device for small electronic and telecommunications equipment has been developed. For thin devices such as an MCPL, securing a vapor flow space is a critical issue for enhancing the thermal performance. In this letter, such enhancement in thermal performance was accomplished by eliminating condensed droplets from the vapor line. By fabricating the grooves in the vapor line to eliminate droplets, a decrease in thermal resistance of about 63.7% was achieved.

• 공업화학
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• 제21권3호
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• pp.353-355
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• 2010

양이온성의 2,2'-azobis(2-methylpropionamidine) (AIBA) 개시제를 이용한 methylmethacrylate (MMA)의 무유화제 에멀전 중합을 통해 polymethylmethacrylate (PMMA) 입자를 합성하였다. 스퇴버 방법을 이용하여 양이온성의 PMMA 입자 표면에 실리카를 코팅하였다. 음전하의 실리카 전구체는 양이온성의 PMMA 입자 표면과의 정전기적 인력에 의해 코팅된다. 실리카 코팅 과정 중에 PMMA 입자가 용해되어 후처리 없이 실리카 중공체를 얻을 수 있었다.

• 마이크로전자및패키징학회지
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• 제23권3호
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• pp.1-6
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• 2016

IoT 적용을 위해서는 다종 소자를 높은 connectivity 밀도로 집적화시키는 전자패키징 기술이 매우 중요하다. FOWLP 기술은 입출력 밀도가 높고, 소자의 집적화가 우수하고, 디자인 유연성이 우수하여, 최근 개발이 집중되고 있는 기술이다. 웨이퍼나 패널 기반의 FOWLP 기술은 초미세 피치 RDL 공정 기술과 몰딩 기술 개발이 최적화 되어야 할 것이다. 3D stacking 기술 특히 웨이퍼 본딩 후 TSV를 제조하는 방법(via after bonding)은 가격을 낮추면서 connectivity를 높이는데 매우 효과적이라 하겠다. 하지만 저온 웨이퍼 본딩이나 TSV etch stop 공정과 같이 아직 해결해야할 단위 공정들이 있다. Substrate 기술은 두께를 줄이고 가격을 낮추는 공정 개발이 계속 주목되겠지만, 칩과 PCB와의 통합설계(co-design)가 더욱 중요하게 될 것이다.

• 대한기계학회논문집A
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• 제20권1호
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• pp.135-145
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• 1996

Order of stress singularities at bonded Edge Corners with two or three dissimilar isotropic Materials is analyzed. The problem is formulated by Mellin transform and characteristic equation is obtained as a determinant of matrix considering boundary conditions. Roots of characterictic equation are determinde by numerical calculations with ward method, from which the order of stress sigularities is obtained. Applying the results to the electronic packaging, the order of stress singularities is obtained. Applying the results to the electronic packaging, the order of stress singularities at bounded edge corners is calculated as a various bouned edge angle with given material combinations. Comparing the results, the optimal material combinaitons of bounded edge corners and bouned edge angle to reduce stress singularity could be determined. It suggests that the results are used to the basic design of electronic packaging reducing the stress singularity.

• Transactions on Electrical and Electronic Materials
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• 제15권2호
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• pp.91-95
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• 2014

This paper presents the structure and process technology of simple and low-cost wafer-level packaging (WLP) for thin film radio frequency (RF) devices. Low-cost practical micromachining processes were proposed as an alternative to high-cost processes, such as silicon deep reactive ion etching (DRIE) or electro-plating, in order to reduce the fabrication cost. Gold (Au)/Tin (Sn) alloy was utilized as the solder material for bonding and hermetic sealing. The small size fabricated WLP of $1.04{\times}1.04{\times}0.4mm^3$ had an average shear strength of 10.425 $kg/mm^2$, and the leakage rate of all chips was lower than $1.2{\times}10^{-5}$ atm.cc/sec. These results met Military Standards 883F (MIL-STD-883F). As the newly proposed WLP structure is simple, and its process technology is inexpensive, the fabricated WLP is a good candidate for thin film type RF devices.

• 마이크로전자및패키징학회지
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• 제21권2호
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• pp.23-29
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• 2014

Less power consumption, lower cost, smaller size and more functionality are the increasing demands for consumer electronic devices. The three dimensional(3-D) TSV packaging technology is the potential solution to meet this requirement because it can supply short vertical interconnects and high input/output(I/O) counts. Cu(Copper) has usually been chosen to fill the TSV because of its high conductivity, low cost and good compatibility with the multilayer interconnects process. However, the CTE mismatch and Cu ion drift under thermal stress can raise reliability issues. This study discribe the thermal stress reliability trend for successful implementation of 3-D packaging.

• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2002년도 Proceedings of the International Welding/Joining Conference-Korea
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• pp.439-449
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• 2002

This paper reviews our recent research works on the interconnection technologies in electronic packaging and assembly. At the aspect of advanced joining methods, laser-ultrasonic fluxless soldering technology was proposed. The characteristic of this technology is that the oxide film was removed through the vibration excitated by high frequency laser change in the molten solder droplet. Application researches of laser soldering technology on solder bumping of BGA packages were carried out. Furthermore, interfacial reaction between SnPb eutectic solder and Au/Ni/Cu pad during laser reflow was analyzed. At the aspect of soldered joints' reliability, the system for predicting and analyzing SMT solder joint shape and reliability(PSAR) has been designed. Optimization design method of soldered joints' structure was brought forward after the investigation of fatigue failure of RC chip devices and BGA packages under temperature cyclic conditions with FEM analysis and experimental study. At the aspect of solder alloy design, alloy design method based on quantum was proposed. The macroproperties such as melting point, wettability and strength were described by the electron parameters. In this way, a great deal of the experimental investigations was replaced, so as to realize the design and research of any kinds of solder alloys with low cost and high efficiency.