• Title/Summary/Keyword: Electronic packaging technology

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Study on the Brazing Characteristics of LTCC/Kovar (LTCC/Kovar 간의 Brazing 특성 연구)

  • Lee, W.S.;Cho, H.M.;Lim, W.;Yoo, C.S.;Lee, Y.S.;Kang, N.K.
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2000.11a
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    • pp.57-57
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    • 2000
  • Brazing characteristics of the LTCC(Low Temperature Co-fired Ceramics)/ Kovar(Fe-Ni-Co alloy) was investigated. Kovar is one of the typical material for the lid of MCM and packages. In case of alumina package, Brazing process is done by higher temperature profile than 800 $^{\circ}C$ and Ag-Cu alloy. But, LTCC has sintering temperature near 850 $^{\circ}C$. So, it is difficult to use the same process as alumina brazing. The adhesion strength of the brazed part is affected by brazing alloy and metallization properties between conductor pattern and LTCC material. We investigated brazing characteristics of the LTCC/Kovar using various brazing alloys(Ag-Cu, Au-Sn) and process conditions. And, we examined the influence of the glass contents in conductor on the brazing characteristics of the LTCC/Kovar.

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S-Parameter Simulation for Trench Structure and Oxide High Dielectric of Trench MIM Capacitor (Trench구조와 산화물 고유전체에 따른 Trench MIM Capacitor S-Parameter 해석)

  • Park, Jung-Rae;Kim, Gu-Sung
    • Journal of the Semiconductor & Display Technology
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    • v.20 no.4
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    • pp.167-170
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    • 2021
  • Integrated passive device (IPD) technology has emerged with the need for 5G. In order to integrate and miniaturize capacitors inside IPD, various studies are actively performed using high-k materials and trench structures. In this paper, an EM(Electromagnetic) simulation study was performed by applying an oxide dielectric to the capacitors having a various trench type structures. Commercially available materials HfO2, Al2O3, and Ta2O5 are applied to non, circle, trefoil, and quatrefoil type trench structures to confirm changes in each material or structure. As a result, the bigger the capacitor area and the higher dielectric constant of the oxide dielectric, the insertion loss tended to decrease.

A Study on the RFID Tag Package Epoxy Molding through Leak Detection (기밀성 분석을 통한 RFID 태그 패키지 에폭시 몰딩 연구)

  • Ban, Chang-Woo;Hong, Seok-Kee;Jang, Dong-Young
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.21 no.2
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    • pp.297-304
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    • 2012
  • Recently RFID (Radio Frequency Identification) technology advances in wireless communication technologies are bringing new challenges. But RFID tag packaging technology has been lagging compared to the demand, so this technology is being required to improve reliability. In this paper, reliability comparison among 11 types of most commonly used epoxy molding in electrical/electronic components packaging has been made through analysis of confidentiality using a humidity sensor. Consequently, the variation of moisture penetration time causes has been verified by the changes in molding thickness for 3 types of epoxy, and from the result, the best experimental results were observed in terms of confidentiality. Moreover we have been confirmed the relationship between confidentiality, the molding thickness, and thermal property of epoxy through thermal analysis.

Bonding Property and Reliability for Press-fit Interconnection (Press-fit 단자 접합특성 및 신뢰성)

  • Oh, Sangjoo;Kim, Dajung;Hong, Won Sik;Oh, Chulmin
    • Journal of the Microelectronics and Packaging Society
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    • v.26 no.3
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    • pp.63-69
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    • 2019
  • Soldering technology has been used in electronic industry for a long time. However, due to solder fatigue characteristics, automotive electronics are searching the semi-permanent interconnection technology such as press-fit method. Press fit interconnection is a joining technology that mechanically inserts a press fit metal terminal into a through hole in a board, and induces a strong bonding by closely contacting the inner surface joining of the through hole by plastic deformation of press-fit terminal. In this paper, the bonding properties of press-fit interconnection are investigated with PCB hole size and surface finishes. In order to compare interconnection reliability between the press fit and soldering, the change in resistance of the press-fit and soldering joints was observed during thermal shock test. After thermal cycling, the failure modes are investigated to reveal the degradation mechanism both press-fit and soldering technology.

Recent Technology Trends and Future Prospects for Image Sensor (이미지 센서의 최근 기술 동향과 향후 전망)

  • Park, Sangsik;Shin, Bhumjae;Uh, Hyungsoo
    • Journal of the Microelectronics and Packaging Society
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    • v.27 no.2
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    • pp.1-10
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    • 2020
  • The technology and market size of image sensors continue to develop thanks to the release of image sensors that exceed 100 million pixels in 2019 and expansion of black box camera markets for vehicles in addition to existing mobile applications. We review the technology flow of image sensors that have been constantly evolving for 40 years since Hitachi launched a 200,000-pixel image sensor in 1979. Although CCD has made inroads into image sensor market for a while based on good picture quality, CMOS image sensor (CIS) with active pixels has made inroads into the market as semiconductor technology continues to develop, since the electrons generated by the incident light are converted to the electric signals in the pixel, and the power consumption is low. CIS image sensors with superior characteristics such as high resolution, high sensitivity, low power consumption, low noise and vivid color continue to be released as the new technologies are incorporated. At present, new types of structures such as Backside Illumination and Isolation Cell have been adopted, with better sensitivity and high S/N ratio. In the future, new photoconductive materials are expected to be adopted as a light absorption part in place of the pn junction.

Flip Chip Assembly Using Anisotropic Conductive Adhesives with Enhanced Thermal Conductivity

  • Yim, Myung-Jin;Kim, Hyoung-Joon;Paik, Kyung-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.12 no.1 s.34
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    • pp.9-16
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    • 2005
  • This paper presents the development of new anisotropic conductive adhesives with enhanced thermal conductivity for the wide use of adhesive flip chip technology with improved reliability under high current density condition. The continuing downscaling of structural profiles and increase in inter-connection density in flip chip packaging using ACAs has given rise to reliability problem under high current density. In detail, as the bump size is reduced, the current density through bump is also increased. This increased current density also causes new failure mechanism such as interface degradation due to inter-metallic compound formation and adhesive swelling due to high current stressing, especially in high current density interconnection, in which high junction temperature enhances such failure mechanism. Therefore, it is necessary for the ACA to become thermal transfer medium to improve the lifetime of ACA flip chip joint under high current stressing condition. We developed thermally conductive ACA of 0.63 W/m$\cdot$K thermal conductivity using the formulation incorporating $5 {\mu}m$ Ni and $0.2{\mu}m$ SiC-filled epoxy-bated binder system to achieve acceptable viscosity, curing property, and other thermo-mechanical properties such as low CTE and high modulus. The current carrying capability of ACA flip chip joints was improved up to 6.7 A by use of thermally conductive ACA compared to conventional ACA. Electrical reliability of thermally conductive ACA flip chip joint under current stressing condition was also improved showing stable electrical conductivity of flip chip joints. The high current carrying capability and improved electrical reliability of thermally conductive ACA flip chip joint under current stressing test is mainly due to the effective heat dissipation by thermally conductive adhesive around Au stud bumps/ACA/PCB pads structure.

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Manufacturing Technology for Tape Casting and Soft Magnetic Powder Using by Recycling Scrap of Fe-Si Electrical Sheet (Fe-Si 전기강판 폐스크랩을 이용한 연자성 분말 및 테이프 제조기술)

  • Hong, Won Sik;Kim, Sang Hyun;Park, Ji-Yeon;Oh, Chulmin;Lee, Woo Sung;Kim, Seung Gyeom;Han, Sang Jo;Shim, Geum Taek;Kim, Hwi-Jun
    • Journal of the Microelectronics and Packaging Society
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    • v.23 no.2
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    • pp.11-18
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    • 2016
  • This study focused on examining the possibility for recycling of Fe-Si electric sheet. We manufactured Fe-6.5Si mother alloy using by Fe-Si electric sheet scrap for transformer core materials. And then, soft magnetic alloy powder which diameter and shape were $45{\sim}150{\mu}m$ and sphere type was prepared by gas atomization process. As we compared to commercial Fe-6.5Si powder, its diameter distribution and microstructure of recycled powder was a similar. To investigate the possibility of reusing the soft magnetic composite sheet for electronics, recycled powder was treated to have a high aspect ratio (AR), and we finally obtained the 65~66 AR and $2.3{\mu}m$ thickness powder. To release the residual stress of powder, heat treatment was conducted under $300{\sim}400^{\circ}C$, $N_2$ gas. And then, soft magnetic sheet was made by tape casting process using by those powders. After the density and permeability of tape was measured, and we confirmed that the recycled Fe-Si electric sheet scrap was possible to reuse the soft magnetic materials of electronics.

Fabrication and Characterization of Low Noise Amplifier using MCM-C Technology (MCM-C 기술을 이용한 저잡음 증폭기의 제작 및 특성평가)

  • Cho, H.M.;Lim, W.;Lee, J.Y.;Kang, N.K.;Park, J.C.
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2000.11a
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    • pp.61-64
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    • 2000
  • We fabricated and characterized Low Noise Amplifier (LNA) using MCM-C (Multi-Chip-Module-Cofired) technology for 2.14 GHz IMT-2000 mobile terminal application. First, We designed LNA circuits and simulated it's high frequency characteristics using circuits simulator. For the simulation, we adopted high frequency libraries of all the devices used in LNA samples. By the simulation, Gain was 17 dB and Noise Figure was 1.4 dB. We used multilayer process of LTCC (Low Temperature Co-fired Ceramics) substrate and conductor, resistor pattern for the MCM-C LNA fabrication. We made 2 buried inductors, 2 buried capacitors and 3 buried resistors. The number of the total layers was 6. On the top layer, we patterned microstrip line and pads for the SMT device. We measured the high frequency characteristics, and the results were 14.7 dB Gain and 1.5 dB Noise Figure.

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V-Band filter using Multilayer MCM-D Technology (MCM-D 공정기술을 이용한 V-BAND FILTER 구현에 관한 연구)

  • Yoo Chan-Sei;Song Sang-Sub;Part Jong-Chul;Kang Nam-Kee;Cha Jong-Bum;Seo Kwang-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.9 s.351
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    • pp.64-68
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    • 2006
  • Novel system-on-package (SOP) - D technology to improve the mechanical and thermal properties of a MCM-D substrate was suggested. Based on this investigation, the two types of band pass filters for the V-band application with unique structure were designed and implemented using 2-metals, 3-BCB layers. The first type using distributed resonator had the insertion loss below 2.6 dB at 55 GHz and group delay was below 0.06 ns. For the second type with edge coupled structure, the insertion loss and group delay were 3 dB and 0.1 ns, respectively. Suggested MCM-D substrate with band pass filter can be used to evaluate mm-Wave system including flip-chip bonded MMIC.

Comparisons of Interfacial Reaction Characteristics on Flip Chip Package with Cu Column BOL Enhanced Process (fcCuBE®) and Bond on Capture Pad (BOC) under Electrical Current Stressing

  • Kim, Jae Myeong;Ahn, Billy;Ouyang, Eric;Park, Susan;Lee, Yong Taek;Kim, Gwang
    • Journal of the Microelectronics and Packaging Society
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    • v.20 no.4
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    • pp.53-58
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    • 2013
  • An innovative packaging solution, Flip Chip with Copper (Cu) Column bond on lead (BOL) Enhanced Process (fcCuBE$^{(R)}$) delivers a cost effective, high performance packaging solution over typical bond on capture pad (BOC) technology. These advantages include improved routing efficiency on the substrate top layer thus allowing conversion functionality; furthermore, package cost is lowered by means of reduced substrate layer count and removal of solder on pad (SOP). On the other hand, as electronic packaging technology develops to meet the miniaturization trend from consumer demand, reliability testing will become an important issue in advanced technology area. In particular, electromigration (EM) of flip chip bumps is an increasing reliability concern in the manufacturing of integrated circuit (IC) components and electronic systems. This paper presents the results on EM characteristics on BOL and BOC structures under electrical current stressing in order to investigate the comparison between two different typed structures. EM data was collected for over 7000 hours under accelerated conditions (temperatures: $125^{\circ}C$, $135^{\circ}C$, and $150^{\circ}C$ and stress current: 300 mA, 400 mA, and 500 mA). All samples have been tested without any failures, however, we attempted to find morphologies induced by EM effects through cross-sectional analysis and investigated the interfacial reaction characteristics between BOL and BOC structures under current stressing. EM damage was observed at the solder joint of BOC structure but the BOL structure did not show any damage from the effects of EM. The EM data indicates that the fcCuBE$^{(R)}$ BOL Cu column bump provides a significantly better EM reliability.