• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.34-34
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• 2009

The electrical characteristics of tunnel barrier engineered charge trap flash (TBE-CTF) memory with $SiO_2/Si_3N_4/SiO_2/Si$ engineered tunnel barrier, $HfO_2$ charge trap layer and $Al_2O_3$ blocking oxide layer (MAHONOS) were investigated. The energy bad diagram was designed by using the quantum-mechanical tunnel model (QM) and then the CTF memory devices were fabricated. As a result, the best thickness combination of MAHONOS is confirmed. Moreover, not enhanced P/E speed (Program: about $10^6$ times) (Erase: about $10^4$ times) but also enhanced retention and endurance characteristics are represented.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.53-53
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• 2009

Charge trap flash memory devices with modified tunneling barriers were fabricated using the tunneling barrier engineering technique. Variable oxide thickness (VARIOT) barrier and CRESTED barrier consisting of thin $SiO_2$ and $Si_3N_4$ dielectric layers were used as engineered tunneling barriers. The VARIOT type tunneling barrier composed of oxide-nitride-oxide (ONO) layers revealed reliable electrical characteristics; long retention time and superior endurance. On the other hand, the CRESTED tunneling barrier composed of nitride-oxide-nitride (NON) layers showed degraded retention and endurance characteristics. It is found that the degradation of NON barrier is associated with the increase of interface state density at tunneling barrier/silicon channel by programming and erasing (P/E) stress.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.203-203
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• 2009

Low temperature annealing for oxide TFTs including IGZO on PI substrate is the essential process to fabricate flexible display devices, since low heat-resistance on PI and PEN substrates limits the temperature range. Laser annealing is one of the promising candidates for low temperature process, and it has been used for various application in semiconductor and LCD fabrication. We irradiated laser to solution-based IGZO thin films on PI substrate were irradiated to laser beam, and investigated laser damage of PI layer. Based on transmittance analysis, wavelength(532nm) and scan speed(1000mm/s) is the optimized condition for laser irradiation about ink-Jet printed oxide TFTs on PI substrates.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.153-153
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• 2009

In the study the volume resistivity Characteristics of epoxy resin using nano and micro filler, nano and micro filler are made from insulating material epoxy resin using for transformer equipment and molding several devices as changing amount of addition of diameter 12 [nm] and 7 [${\mu}m$] $SiO_2$, we measured volume resistivity of nano and micro filler by High Resistance Meter(4329A). As the result of measurement, When is micro filler, the volume resistivity continuously increased over 80 [$^{\circ}$].

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.70-70
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• 2009

In this paper, we proposed 2500V Non punch-through(NPT) Insulated gate bipolar transistor(IGBT) for high voltage industry application. we carried out optimal simulation for high efficiency of 2500V NPT IGBT according to size of device. In results, we obtaind design parameter with 375um n-drift thickness, 15um gate length, and 8um emitter windows. After we simulate with optimal parameter, we obtained 2840V breakdown voltage and 3.4V Vce,sat. These design and process parameter will be used designing of more 2000V NPT IGBT devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.59-59
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• 2009

The efficiency of CMOS technology has been developed in uniform rate. However, there was a limitation of reducing the thickness of Gate-oxide since the thickness of Gate Dielectric is also reduced so an amount of leakage current is grow. In order to solve this problem, the semiconductor device which has a dual gate is used widely. This paper presents a method and a necessity for making the Gate Stack of TFT. Before Using test devices to measure values, stacking $SiN_x$ on a wafer test was conducted.

• ETRI Journal
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• v.32 no.6
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• pp.863-870
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• 2010

In recent years, the development of multimedia devices has meant that a wider multimedia streaming service can be supported, and there are now many ways in which TV channels can communicate with different terminals. Generally, scalable video streaming is known to provide more efficient channel capacity than simulcast video streaming. Simulcast video streaming requires a large network bandwidth for all resolutions, but scalable video streaming needs only one flow for all resolutions. In previous research, scalable video streaming has been compared with simulcast video streaming for network channel capacity, in two user simulation environments. The simulation results show that the channel capacity of SVC is 16% to 20% smaller than AVC, but scalable video streaming is not efficient because of the limit of the present network framework. In this paper, we propose a new network framework with an SVC extractor. The proposed network framework shows a channel capacity 50% (maximum) lower than that found in previous research studies.

• Journal of Institute of Control, Robotics and Systems
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• v.15 no.3
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• pp.337-345
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• 2009

The dependence of numerous systems on electronic devices is causing rapidly increasing concern over fault tolerance because of safety issues of safety critical system. As an example, a vehicle with electronics-controlled system such as x-by-wire systems, which are replacing rigid mechanical components with dynamically configurable electronic elements, should be fault￢tolerant because a devastating failure could arise without warning. Fault-tolerant systems have been studied in detail, mainly in the field of aeronautics. As an alternative to solve these problems, this paper presents the fuzzy hybrid redundancy system that can remove most erroneous faults with fuzzy fault detection algorithm. In addition, several numerical simulation results are given where the fuzzy hybrid redundancy outperforms with general voting method.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.731-734
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• 2005

In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD (Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at the same time. Maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps. And Zener Triggered SCR devices to protect the ESD phenomenon were designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 5.8V. Finally, we performed the layout high speed I/O interface circuit with the low triggered ESD protection device in one-chip.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.2
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• pp.186-191
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• 2017

An integrated pressure-sensor system was developed using the sensor-conditioning processes, which resulted in the optimum sensitivity of the pressure-sensor through the signal amplification, noise reduction, and level shift. Due to the specified characteristics among the components, such as operation range, the sensor output was generally limited compared to the full scale of the reading when coupled with other parts. Devices fabricated exhibited comparable characteristics with higher pressure sensitivity to that of the pressure sensor without sensor-conditioning process. In this work, the sensor resolution was at least enhanced at least by 25% using the sensor-conditioning processes.