• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.330-333
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• 2002

The design of high power electronic circuits and the verification of the design by practical experiments are time and cost consuming. Recently power circuit simulation technique is developing to do it easily. However, most of the simulation has used the ideal switch model consists of passive component that can not describe the physical characteristics of semiconductor devices and cannot describe the switching transient state. For the design of such power electronic circuits by the simulation, the switching transients are very important. Therefore the simulation models must describe the switching transient and the stationary behavior as precisely as possible on the hand and as fast as possible the other hand. This paper introduces the application of the physical models of power devices that are developed by TUM(Technical University of Munich, Germany) for the power electronic circuit analysis.

• Journal of Power Electronics
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• v.12 no.3
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• pp.458-467
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• 2012

Single phase converters suffer from ripple power pulsating at twice the line frequency. The ripple power is usually absorbed by a bulky capacitor bank and/or a dedicative LC resonant link, resulting in a low power density and a high cost. An alternative solution is using a dc link active power filter (APF) to direct the pulsating power into another energy-storage component. The main dc link filter capacitor can then be reduced substantially. Based on a mainstream dc APF topology, this paper proposed a new control strategy incorporating both dual-loop control and repetitive control. The circuit parameter design is also re-examined from a control point of view. The proposed APF scheme has better control performance, and is more suited for high power applications since it works in CCM and with a low switching frequency.

• Proceedings of the Korean Information Science Society Conference
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• 2000.04a
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• pp.187-189
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• 2000

Nowadays, efforts are in progress for the standardization of CORBAbased telecommunication network management framework. To implement a network management system based on the framework completely, CORBA ORB and some of CORBA service should be installed in the element. And then, there must be the naming tree, which correspond to the containment relationships between components in the network element. If we use conventional OMG naming service to form the naming tree, all MOs, a software fragmenthat corresponds to each component in a system, should be instantiated. However, the network element is usually a kind of limited resource system, which cannot provide sufficient resources for applications run on it. Hence, instantiatingall MOs can cause problems for that kind of system, This paper presents Smart Naming Service architecture as a solution to the problem.

• Journal of the Optical Society of Korea
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• v.19 no.6
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• pp.575-585
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• 2015

Magnetic field in magnetic bearings is the physical medium to realize magnetic levitation, the distribution of the magnetic field determines the operating performance of magnetic bearings. In this paper, a thin-slice Fiber Bragg Grating-Giant Magnetostrictive Material magnetic sensor used for the air gap of magnetic bearings was proposed and tested in the condition of dynamic magnetic field. The static property of the sensor was calibrated and a polynomial curve was fitted to describe the performance of the sensor. Measurement of dynamic magnetic field with different frequencies in magnetic bearings was implemented. Comparing with the finite element simulations, the results showed the DC component of the magnetic field was detected by the sensor and error was less than 5.87%.

• Journal of information and communication convergence engineering
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• v.3 no.4
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• pp.187-190
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• 2005

High aspect ratio via-hole etching process has emerged as one of the most crucial means to increase component density for ULSI devices. Because of charge accumulation in via-hole, this sophisticated and important process still hold several problems, such as etching stop and loading effects during fabrication of integrated circuits. Indeed, the concern actually depends on accumulated charge. For monitoring accumulated charge during plasma etching process, charge-up monitoring sensor was fabricated and tested under some plasma conditions. This paper presents a neural network-based technique for analyzing and modeling several electrical performance of plasma charge-up monitoring sensor.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.847-850
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• 2000

This paper proposes an image compressing and template matching algorithm for face image using GHA (Generalized Hebbian Algorithm). GHA is a part of PCA (Principal Component Analysis), that has single-layer perceptrons and operates and self-organizing performance. We used this algorithm for feature extraction of face shape, and our simulations verify the high performance for the proposed method. The shape for face in the fact that the eigenvector of face image can be efficiently represented as a coefficient that can be acquired by a set of basis is to compress data of image. From the simulation results, the mean PSNR performance is 24.08[dB] at 0.047bpp, and reconstruction experiment shows that good reconstruction capacity for an image that not joins at leaning.

• Journal of the Semiconductor & Display Technology
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• v.14 no.4
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• pp.67-71
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• 2015

Product of technology developed in this study is an external interface for controlling the equipment of pendant key remote control system circuit board, and it is used in the electronic component test equipment system. Main control system module is in the role as a device for controlling the various control devices that make up the integrated system for microscopic examination at the request of the host computer engineers to control the inspection equipment. The pentane-key interface module to its role as a device for controlling the various control devices that make up the integrated system for microscopic examination at the request of the host computer for the engineer to control the inspection equipment. Development of the control system can be expected in the configuration of a system for efficient and accurate inspection of high-precision parts.

• Journal of Mechanical Science and Technology
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• v.20 no.10
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• pp.1527-1533
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• 2006

Workflow systems have benefited the enterprise and customer in many aspects. But with the increasing complexity of the system, workflow design becomes a complicated and time-consuming process. In this paper, we model the system based on the Hierarchical Colored Petri Nets (HCPN) to avoid the complexity of the system, and the super nets of the model are abstracted as independent components to increase the flexibility, acceptability and maintainability of the system. Another important characteristic of this model is its convenience for reuse and workflow mining. The development process of the overhead traveling crane was given to demonstrate the proposed method.

• Journal of information and communication convergence engineering
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• v.17 no.4
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• pp.285-289
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• 2019

A 1.9-GHz linear CMOS power amplifier is presented. An adaptive bias circuit (ABC) that utilizes an AC ground to detect the power level of the input signal is proposed to enhance the linearity and efficiency of the power amplifier. The ABC utilizes the second harmonic component as the input to mitigate the distortion of the fundamental signal. The input power level of the ABC was detected at the AC ground located at the V_DD node of the power amplifier. The output of the ABC was fed into the inputs of the power stage. The input signal distortion was mitigated by detecting the input power level at the AC ground. The power amplifier was designed using a 180 nm RFCMOS process to evaluate the feasibility of the application of the proposed ABC in the power amplifier. The measured output power and power-added efficiency were improved by 1.7 dB and 2.9%, respectively.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.5
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• pp.475-480
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• 2018

In OFDM-based systems, FFT is a critical component since it occupies large area and consumes more power. In this paper, we present a low hardware-cost and low power 512-point pipelined FFT design method for OFDM applications. To reduce the number of twiddle factors and to choose simple design architecture, the radix-$2^4-2^3$ algorithm are exploited. For twiddle factor multiplication, we propose a new canonical signed digit (CSD) complex multiplier design method to minimize the hardware-cost. In hardware implementation with Intel FPGA, the proposed FFT design achieves more than about 28% reduction in gate count and 18% reduction in power consumption compared to the previous approaches.