• Title/Summary/Keyword: ESD effects

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Damage and Failure Characteristics of Semiconductor Devices by ESD (ESD에 의한 반도체소자의 손상특성)

  • 김두현;김상렬
    • Journal of the Korean Society of Safety
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    • v.15 no.4
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    • pp.62-68
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    • 2000
  • Static electricity in electronics manufacturing plants causes the economic loss, yet it is one of the least understood and least recognized effects haunting the industry today. Today's challenge in semiconductor devices is to achieve greater functional density pattern and to miniaturize electronic systems of being more fragile by electrostatic discharges(ESD) phenomena. As the use of automatic handling equipment for static-sensitive semiconductor components is rapidly increased, most manufacturers need to be more alert to the problem of ESD. One of the most common causes of electrostatic damage is the direct transfer of electrostatic charge from the human body or a charged material to the static-sensitive devices. To evaluate the ESD hazards by charged human body and devices, in this paper, characteristics of electrostatic attenuation in domestic semiconductor devices is investigated and the voltage to cause electronic component failures is investigated by field-induced charged device model(FCDM) tester. The FCDM simulator provides a fast and inexpensive test that faithfully represents ESD hazards in plants. Also the results obtained in this paper can be used for the prevention of semiconductor failure from ESD hazards.

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Comparison of scissor-type knife to non-scissor-type knife for endoscopic submucosal dissection: a systematic review and meta-analysis

  • Harishankar Gopakumar;Ishaan Vohra;Srinivas Reddy Puli;Neil R Sharma
    • Clinical Endoscopy
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    • v.57 no.1
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    • pp.36-47
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    • 2024
  • Background/Aims: Scissor-type endoscopic submucosal dissection (ST-ESD) knives can reduce the adverse events associated with ESDs. This study aimed to compare ST-ESD and non-scissor-type (NST)-ESD knives. Methods: We identified ten studies that compared the performance characteristics and safety profiles of ST-ESD and NST-ESD knives. Fixed- and random-effects models were used to calculate the pooled proportions. Heterogeneity was assessed using the I2 test. Results: On comparing ST-ESD knives to NST-ESD knives, the weighted odds of en bloc resection was 1.61 (95% confidence interval [CI], 0.90-2.90; p=0.14), R0 resection was 1.10 (95% CI, 0.71-1.71; p=0.73), delayed bleeding was 0.40 (95% CI, 0.17-0.90; p=0.03), perforation was 0.35 (95% CI, 0.18-0.70; p<0.01) and ESD self-completion by non-experts was 1.89 (95% CI, 1.20-2.95; p<0.01). There was no heterogeneity, with an I2 score of 0% (95% CI, 0%-54.40%). Conclusions: The findings of reduced odds of perforation, a trend toward reduced delayed bleeding, and an improvement in the rates of en bloc and R0 resection with ST-ESD knives compared to NST-ESD knives support the use of ST-ESD knives when non-experts perform ESDs or as an adjunct tool for challenging ESD procedures.

Mixed-Mode Transient Analysis of HBM ESD Phenomena (HBM ESD 현상의 혼합모드 과도해석)

  • Choe, Jin-Yeong;Song, Gwang-Seop
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.1
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    • pp.1-12
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    • 2001
  • Based on mixed-mode transient analyses utilizing a 2-dimensional device simulator, we have suggested the methodology to analyze the HBM ESD phenomena in CMOS chips utilizing NMOS transistors for ESD protection, and have analyzes the HBM discharge mechanisms in detail. Also the second breakdown characteristics in the protection device have been successfully simulated based on mixed-mode simulations, to explain the discharge mechanisms leading to device failure. To analyze the effects of the device structure changes on the discharge characteristics, we have compared the results of DC analyses and mixed-mode transient analyses, and have discussed about more robust designs of NMOS transistor structures against HBM ESD based on the analyses.

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Improvements of Extended Drain NMOS (EDNMOS) Device for Electrostatic Discharge (ESD) Protection of High Voltage Operating LDI Chip (고전압용 LDI 칩의 정전기 보호를 위한 EDNMOS 소자의 특성 개선)

  • Yang, Jun-Won;Seo, Yong-Jin
    • Journal of Satellite, Information and Communications
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    • v.7 no.2
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    • pp.18-24
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    • 2012
  • High current behaviors of the extended drain n-type metal-oxide-semiconductor field effects transistor (EDNMOSFET) for electrostatic discharge (ESD) protection of high voltage operating LDI (LCD Driver IC) chip are analyzed. Both the transmission line pulse (TLP) data and the thermal incorporated 2-dimensional simulation analysis demonstrate a characteristic double snapback phenomenon after triggering of biploar junction transistor (BJT) operation. Also, background doping concentration (BDC) is proven to be a critical factor to affect the high current behavior of the EDNMOS devices. The EDNMOS device with low BDC suffers from strong snapback in the high current region, which results in poor ESD protection performance and high latchup risk. However, the strong snapback can be avoided in the EDNMOS device with high BDC. This implies that both the good ESD protection performance and the latchup immunity can be realized in terms of the EDNMOS by properly controlling its BDC.

Characteristics of Double Polarity Source-Grounded Gate-Extended Drain NMOS Device for Electro-Static Discharge Protection of High Voltage Operating Microchip (마이크로 칩의 정전기 방지를 위한 DPS-GG-EDNMOS 소자의 특성)

  • Seo, Yong-Jin;Kim, Kil-Ho;Lee, Woo-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.97-98
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    • 2006
  • High current behaviors of the grounded gate extended drain N-type metal-oxide-semiconductor field effects transistor (GG_EDNMOS) electro-static discharge (ESD) protection devices are analyzed. Simulation based contour analyses reveal that combination of BJT operation and deep electron channeling induced by high electron injection gives rise to the 2-nd on-state. Thus, the deep electron channel formation needs to be prevented in order to realize stable and robust ESD protection performance. Based on our analyses, general methodology to avoid the double snapback and to realize stable ESD protection is to be discussed.

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Meta-Analysis of ESD Program Studies in Home Economics Classes (가정과수업에서 ESD 프로그램 연구의 메타분석)

  • Yu, Nan Sook;Park, Mi Jeong
    • Journal of Korean Home Economics Education Association
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    • v.35 no.3
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    • pp.97-116
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    • 2023
  • This study conducted a meta-analysis on the effectiveness of education for sustainable development (ESD) programs within home economics classes. Articles spanning from 2000 to April 2023 were sourced from the Korean Citation Index (KCI) using search terms such as 'environment', 'sustainable', 'ESD', 'green', 'ecology', and 'home economics' in conjunction with 'development', 'application', and 'effectiveness'. Out of the gathered articles, 41 were chosen for analysis. Using a random effects model, the overall effect size was measured at 0.51 (SE=.08), suggesting that ESD programs significantly enhance student achievement in home economics. Further analysis of the 62 effect sizes, categorized by research design, ESD area (society, environment, economy), content area, school level, and school location, revealed that the research design, content area, and school location functioned as moderating variables. The findings of this meta-analysis underscore the efficacy of ESD in home economics education. Additionally, this study paves the way for future research, highlighting the importance of integrating economic perspectives in ESD, such as sustainable production and consumption, corporate sustainability, and market economy within home economics classes.

ESD Design and Analysis Tools for LEO SAT (저궤도 위성의 ESD 설계 및 해석도구)

  • Lim, Seong-Bin;Kim, Tae-Youn;Jang, Jae-Woong
    • Current Industrial and Technological Trends in Aerospace
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    • v.7 no.1
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    • pp.68-78
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    • 2009
  • In this paper, the electrostatic charging and discharging mechanism, and its effects in space plasma environment are reviewed and the system design control documents, ESD analysis tools and modelling techniques, and the SPIS program in Europe are introduced. A design of the satellite system against the electrostatic discharge (ESD) effects in space plasma environments is carefully taken into account at the early stage of development. In a view of the space system design, it really depended on the mission of system, electrical and mechanical configuration, system operation, and orbit condition. Behavior of the electrons and the ions in those environments may be occurred the sever problem to the satellite operation. So it is carefully understood for implementation of the satellite system. By this reason, the space environments and its effects have been comprehensively studied in U.S.A and Europe.

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Mixed-Mode Transient Analysis of CDM ESD Phenomena (CDM ESD 현상의 혼합모드 과도해석)

  • Choe, Jin-Yeong;Song, Gwang-Seop
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.3
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    • pp.155-165
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    • 2001
  • By suggesting a mixed-mode transient simulation method utilizing a 2-dimensional device simulator, we have analyzed CDM ESD Phenomena in CMOS chips, which utilize NMOS transistors as ESD protection devices. By analyzing the simulation results, the mechanisms leading to device failures in CDM discharge and the differences in discharge characteristics with different polarities of stored charges have been explained in detail. The effects of changes in interconnection resistance values on the gate-oxide failure at input buffers, which is the most serious problem in CDM discharge, have been examined. Also improvements in discharge characteristics with addition of the NMOS transistor for input-buffer protection have been examined.

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The Development and Application of Education for Sustainable Development Program Using Community Resources (지역사회 자원을 활용한 지속가능발전교육 프로그램의 개발과 적용)

  • Ham, Da-Jeong;Park, Jae-Keun
    • Journal of Korean Elementary Science Education
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    • v.38 no.1
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    • pp.149-162
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    • 2019
  • The purpose of this study was to develop an education for sustainable development(ESD) program using community resources in Paju and to investigate the influences on ESD competencies of 6th graders. The community resources used were Unjeong lake park, environmental circulation center, environmental management center, currency museum, butterfly museum, experience center for peaceful unification, Yulgok arboretum, and Jangsan observatory. The newly developed program was related to creative-experience activity and composed of 15 sessions for 6th-grade class in elementary school, including all of the environmental, economic, and social aspects of ESD. Two classes of the 6th grade were divided into the experimental group and the control group. The results to examine the effects of the program were as follows. First, it was proven that ESD program using community resources did not help improving the perception and function competencies of learners except for the thinking abilities. Second, it contributed to the improvement of learners' attitude competencies, especially in self-reflective attitude and other-oriented attitude. Also, according to in-depth interview, the students were constantly developing their values for sustainable development, reflecting their thoughts and behaviors in a reflective way and improving their attitude toward life.

Eletrostatic Discharge Effects on AlGaN/GaN High Electron Mobility Transistor on Sapphire Substrate (사파이어 기판을 사용한 AlGaN/GaN 고 전자이동도 트랜지스터의 정전기 방전 효과)

  • Ha Min-Woo;Lee Seung-Chul;Han Min-Koo;Choi Young-Hwan
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.54 no.3
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    • pp.109-113
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    • 2005
  • It has been reported that the failure phenomenon and variation of electrical characteristic due to the effect of electrostatic discharge(ESD) in silicon devices. But we had fess reports about the phenomenon due to the ESD in the compound semiconductors. So there are a lot of difficulty to the phenomenon analysis and to select the protection method of main circuits or the devices. It has not been reported that the relation between the ESD stress and GaN devices, which is remarkable to apply the operation in high temperature and high voltage due to the superior material characteristic. We studied that the characteristic variation of the AlGaN/GaN HEMT current, the leakage current, the transconductance(gm) and the failure phenomenon of device due to the ESD stress. We have applied the ESD stress by transmission line pulse(TLP) method, which is widely used in ESD stress experiments, and observed the variation of the electrical characteristic before and after applying the ESD stress. The on-current trended to increase after applying the ESD stress. The leakage current and transconductance were changed slightly. The failure point of device was mainly located in middle and edge sides of the gate, was considered the increase of temperature due to a leakage current. The GaN devices have poor thermal characteristic due to usage of the sapphire substrate, so it have been shown to easily fail at low voltage compared to the conventional GaAs devices.