Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Mixed-Mode Transient Analysis of CDM ESD Phenomena

CDM ESD 현상의 혼합모드 과도해석

  • Choe, Jin-Yeong (Dept. of Electronic Electrical and Computer Engineering, Hongik University) ;
  • Song, Gwang-Seop (Dept. of Electrical Engineering, Hongik University)
  • 최진영 (홍익대학교 전자전기컴퓨터공학부) ;
  • 송광섭 (홍익대학교 전기공학과)
  • Published : 2001.03.01
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Abstract

By suggesting a mixed-mode transient simulation method utilizing a 2-dimensional device simulator, we have analyzed CDM ESD Phenomena in CMOS chips, which utilize NMOS transistors as ESD protection devices. By analyzing the simulation results, the mechanisms leading to device failures in CDM discharge and the differences in discharge characteristics with different polarities of stored charges have been explained in detail. The effects of changes in interconnection resistance values on the gate-oxide failure at input buffers, which is the most serious problem in CDM discharge, have been examined. Also improvements in discharge characteristics with addition of the NMOS transistor for input-buffer protection have been examined.

2차원 소자 시뮬레이터를 사용하는 혼합모드 과도해석 방법을 제시하여, NMOS 트랜지스터를 ESD 보호용 소자로 사용하는 CMOS 칩에서의 충전소자모델(CDM) ESD 현상에 대한 분석을 시도하였다. 과도해석 결과의 분석을 통해 CDM 방전 경우 소자 파괴에 이르는 미케니즘에 대해 상세히 설명하였고 충전전기의 극성에 따른 방전 특성의 차이점도 비교 분석하였다. CDM 방전에서 가장 문제가 되는 입력버퍼의 게이트 산화막 파괴문제와 관련하여 배선저항 값의 변화에 의한 영향을 검토하였고, 입력버퍼회로 보호용 NMOS 트랜지스터의 추가에 의한 방전 특성의 변화에 대해 조사하였다.

Keywords

References

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