• Transactions on Electrical and Electronic Materials
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• v.14 no.2
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• pp.63-66
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• 2013

This paper describes the highly productive process technologies of microprobe arrays, which were used for a probe card to test a Dynamic Random Access Memory (DRAM) chip with fine pitch pads. Cantilever-type microprobe arrays were fabricated using conventional micro-electro-mechanical system (MEMS) process technologies. Bonding material, gold-tin (Au-Sn) paste, was used to bond the Ni-Co alloy microprobes to the ceramic space transformer. The electrical and mechanical characteristics of a probe card with fabricated microprobes were measured by a conventional probe card tester. A probe card assembled with the fabricated microprobes showed good x-y alignment and planarity errors within ${\pm}5{\mu}m$ and ${\pm}10{\mu}m$, respectively. In addition, the average leakage current and contact resistance were approximately 1.04 nA and 0.054 ohm, respectively. The proposed highly productive microprobes can be applied to a MEMS probe card, to test a DRAM chip with fine pitch pads.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.145-145
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• 2010

반도체 소자의 크기가 수십 나노미터 영역으로 줄어들면서, 메모리 소자 또한 미세화를 위해 새로운 기술을 요구하고 있다. 1T DRAM은 하나의 트랜지스터와 하나의 캐패시터 구조를 가진 기존의 DRAM과 달리, 캐패시터 영역을 없애고 하나의 트랜지스터만으로 동작하기 때문에 복잡한 공정과정을 줄일 수 있으며 소자집적화에도 용이하다. 또한 SOI (Silicon-On-Insulator) 기판을 사용함으로써 단채널효과와 누설전류를 감소시키고, 소비전력이 적다는 이점을 가지고 있다. 1T DRAM은 floating body effect에 의해 상부실리콘의 중성영역에 축적된 정공을 이용하여 정보를 저장하게 된다. floating body effect를 발생시키기 위해 본 연구에서는 SOI 기판을 사용한 MOSFET을 사용하였는데, SOI 기판은 불순물 도핑농도에 따라 상부실리콘의 공핍층 두께가 결정된다. 실제로 불순물을 $10^{15}cm^{-3}$ 정도 도핑을 하게 되면 완전공핍된 SOI 구조가 된다. 이는 subthreshold swing값이 작고 저전압, 저전력용 회로에 적합한 특성을 보이기 때문에 부분공핍된 SOI 구조보다 우수한 특성을 가진다. 하지만, 상부실리콘의 중성영역이 완전히 공핍되어 정공이 축적될 공간이 존재하지 않게 된다. 이를 해결하기 위해 기판에 전압을 인가 후 kink effect를 확인하여, 메모리 소자로서의 구동 가능성을 알아보았다. 본 연구에서는 상부실리콘의 두께가 감소함에 따라 1T DRAM의 메모리 특성변화를 관찰하고자, TMAH (Tetramethy Ammonuim Hydroxide) 용액을 이용한 습식식각을 통해 상부실리콘의 두께가 각기 다른 소자를 제작하였다. 제작된 소자는 66 mv/dec의 우수한 subthreshold swing 값을 나타내며 빠른 스위칭 특성을 보였다. 또한 kink effect가 발생하는 최적의 조건을 찾고, 상부실리콘의 두께가 메모리 소자의 쓰기/소거 동작의 경향성에 미치는 영향을 평가하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.120-120
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• 2011

Graphene is a carbon based material and it has great potential of being utilized in various fields such as electronics, optics, and mechanics. In order to develop graphene-based logic systems, graphene field-effect transistor (GFET) has been extensively explored. GFET requires supporting devices, such as volatile memory, to function in an embedded logic system. As far as we understand, graphene has not been studied for volatile memory application, although several graphene non-volatile memories (GNVMs) have been reported. However, we think that these GNVM are unable to serve the logic system properly due to the very slow program/read speed. In this study, a GVM based on the GFET structure and using an engineered graphene channel is proposed. By manipulating the deposition condition, charge traps are introduced to graphene channel, which store charges temporarily, so as to enable volatile data storage for GFET. The proposed GVM shows satisfying performance in fast program/erase (P/E) and read speed. Moreover, this GVM has good compatibility with GFET in device fabrication process. This GVM can be designed to be dynamic random access memory (DRAM) in serving the logic systems application. We demonstrated GVM with the structure of FET. By manipulating the graphene synthesis process, we could engineer the charge trap density of graphene layer. In the range that our measurement system can support, we achieved a high performance of GVM in refresh (>10 ${\mu}s$) and retention time (~100 s). Because of high speed, when compared with other graphene based memory devices, GVM proposed in this study can be a strong contender for future electrical system applications.

• The KIPS Transactions:PartA
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• v.18A no.4
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• pp.135-142
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• 2011

This research is to design an effective buffer structure and its management for flash memory based high performance SSDs (Solid State Disks). Specifically conventional SSDs tend to show asymmetrical performance in read and /write operations, in addition to a limited number of erase operations. To minimize the number of erase operations and write latency, the degree of interleaving levels over multiple flash memory chips should be maximized. Thus, to increase the interleaving effect, an effective buffer structure is proposed for the SSD with a hybrid address mapping scheme and super-block management. The proposed buffer operation is designed to provide performance improvement and enhanced flash memory life cycle. Also its management is based on a new selection scheme to determine random and sequential accesses, depending on execution characteristics, and a method to enhance the size of sequential access unit by aggressive merging. Experiments show that a newly developed mapping table under the MBA is more efficient than the basic simple management in terms of maintenance and performance. The overall performance is increased by around 35% in comparison with the basic simple management.

• Proceedings of the Technology Innovation Conference
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• 2003.02a
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• pp.173-190
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• 2003

Demand forecasting is essential in establishing national and corporate strategy as well as the management of their resource. We forecast demand for multi-generation product using discrete choice model combining diffusion model The discrete choice model generally captures consumers'valuation of the product's qualify in the framework of a cross-sectional analysis. We incorporate diffusion effects into a discrete choice model in order to capture the dynamics of demand for multi-generation products. As an empirical application, we forecast demand for worldwide DRAM (dynamic random access memory) and each of its generations from 1999 to 2005. In so doing, we use the method of 'Technological Forecasting'for DRAM Density and Price of the generations based on the Moore's law and learning by doing, respectively. Since we perform our analysis at the market level, we adopt the inversion routine in using the discrete choice model and find that our model performs well in explaining the current market situation, and also in forecasting new product diffusion in multi-generation product markets.

• Korean Journal of Materials Research
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• v.26 no.9
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• pp.486-492
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• 2016

Tungsten (W) thin film was deposited at $400^{\circ}C$ using pulsed chemical vapor deposition (pulsed CVD); film was then evaluated as a nucleation layer for W-plug deposition at the contact, with an ultrahigh aspect ratio of about 14~15 (top opening diameter: 240~250 nm, bottom diameter: 98~100 nm) for dynamic random access memory. The deposition stage of pulsed CVD has four steps resulting in one deposition cycle: (1) Reaction of $WF_6$ with $SiH_4$. (2) Inert gas purge. (3) $SiH_4$ exposure without $WF_6$ supply. (4) Inert gas purge while conventional CVD consists of the continuous reaction of $WF_6$ and $SiH_4$. The pulsed CVD-W film showed better conformality at contacts compared to that of conventional CVD-W nucleation layer. It was found that resistivities of films deposited by pulsed CVD were closely related with the phases formed and with the microstructure, as characterized by the grain size. A lower contact resistance was obtained by using pulsed CVD-W film as a nucleation layer compared to that of the conventional CVD-W nucleation layer, even though the former has a higher resistivity (${\sim}100{\mu}{\Omega}-cm$) than that of the latter (${\sim}25{\mu}{\Omega}-cm$). The plan-view scanning electron microscopy images after focused ion beam milling showed that the lower contact resistance of the pulsed CVD-W based W-plug fill scheme was mainly due to its better plug filling capability.

• Korean Journal of Materials Research
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• v.23 no.8
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• pp.405-422
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• 2013

Atomic layer deposition(ALD) is a promising deposition method and has been studied and used in many different areas, such as displays, semiconductors, batteries, and solar cells. This method, which is based on a self-limiting growth mechanism, facilitates precise control of film thickness at an atomic level and enables deposition on large and three dimensionally complex surfaces. For instance, ALD technology is very useful for 3D and high aspect ratio structures such as dynamic random access memory(DRAM) and other non-volatile memories(NVMs). In addition, a variety of materials can be deposited using ALD, oxides, nitrides, sulfides, metals, and so on. In conventional ALD, the source and reactant are pulsed into the reaction chamber alternately, one at a time, separated by purging or evacuation periods. Thermal ALD and metal organic ALD are also used, but these have their own advantages and disadvantages. Furthermore, plasma-enhanced ALD has come into the spotlight because it has more freedom in processing conditions; it uses highly reactive radicals and ions and for a wider range of material properties than the conventional thermal ALD, which uses $H_2O$ and $O_3$ as an oxygen reactant. However, the throughput is still a challenge for a current time divided ALD system. Therefore, a new concept of ALD, fast ALD or spatial ALD, which separate half-reactions spatially, has been extensively under development. In this paper, we reviewed these various kinds of ALD equipment, possible materials using ALD, and recent ALD research applications mainly focused on materials required in microelectronics.

• Proceedings of the Korean Vacuum Society Conference
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• 1998.02a
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• pp.80-80
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• 1998

RU02 박막은 전이금속으로서 rutile 구조이며, 넓은 온도 영역에서 금속성의 를 나타내고, 700도 이상의 높은 온도에서 열적 안정성을 갖는 물질이다 이러한 특성 때문 에 RU02 박막은 실리콘 디바이스에서 배선 게이트 전극 확산 장벽 등에 응용가능성이 높 은 물질로 각광을 받고 있다- 특히 다결정 RU02 박막은 DRAM (dynamic random access m memory) 내의 강유전성 축전기의 전극으로서 유망한 물질이다. 지금까지 이러한 응용분야에 사용된 전극물질은 pt 금속이었다 그러나 이러한 금속전극은 SI 산소 그리고 강유전체의 구성물질 등과의 상호확산, pt 표면의 hillock의 존재로 생기는 전기적 단락, 기판과의 나쁜 점작성, 어려운 에칭 프로세스 등의 단점을 가지고 있다 더욱 더 심각한 문제는 P Pt'ferroelectric/Pt 구조에서 나타나는 aging과 fatigue인데, 이는 108 사이쿨 이후에 스위칭 가 능한 잔류 pOlarization 으$\mid$ 감소를 유발하게 된다- 최근 Berstein은 Pt 대신에 RU02를 사용함으로써 강유전체 축전기에서의 fatigue 현상을 크게 감소시켰다고 보고 한 바 있다 Burst川도 RU02 가 실리콘 표면과 유전체 물질 사이에 전기전도 어떠한 상호 확산도 일어나지 않음을 보였다. 그러나 이러한 연구 결과에도 증착조건과 RU02 박악의 특성에 관한 상호 관계가 충분히 더욱 더 중은 강유전성 박막올 만들기 위해서는 이러한 박막 전극에 않고 있다 연구되지 대한 상세한 연구가 반드시 필요하다고 본다. RU02 박막은 실리콘 기판 위에 고주파 마그네트론 스퍼터링 방법으로 증착하였다. 사용 한 타켓은 2 인치의 직경을 가지는 CERAC 사에서 제작한 Ruol다 초기 진공은 1O~6 Torr 이하였고, 고주파 전력은 20 - 80W 까지 변화시켰다 반응성 스퍼터링율 하기 위해 아르곤과 산소롤 주입하였고, 산소/(산소+아르곤)의 비를 변화시켰다 기판의 온도와 증착압력은 각각 상온에 서 500도까지 , 5mTorr에 서 100mTorr 까지 변 화시 켰 다 RU02 박막의 결정성을 조사하기 위해 XRD 표면 형상과 단면을 조사하기 위해 SEM을 사용하였다‘ 박악의 비저항을 조사하기 위해 4-단자법 van der Pauw 방법을 사용하였다. RU02 박막은 증착압력이 높을수록 비저항은 높아지고, 두께는 감소하였다. 특히 1 100mTorr에서는 작업가스와 스퍼터된 입자사이의 심각한 산란 때문에 아예 증착이 이루어 지지 않았다‘ RF 전력이 증가할수록 비저항이 낮아졌다. 이는 두께에 의존하는 결과이며 전형적인 금속박막에서 나타나는 현상과 유사함을 알 수 있었다- 기판온도와 작업가스의 산소 분압이 높을수록 비저항이 감소하였다‘ 이러한 사실은 성장한 박악의 결정구조와 밀접한 관련이 있음을 보여준다.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.186-186
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• 2013

Nitrogen doped Ge-Sb-Te (N-GST) thin films for phase change random access memory (PRAM) applications were investigated by synchrotron-radiation-based x-ray photoelectron spectroscopy and absorption spectroscopy. Nitrogen doping in GST resulted in more favorable N atoms' bonding with Ge atoms rather than with Sb and Te atoms [1,2], which explains the higher phase change transition temperature than that of undoped Ge-Sb-Te thin film. Surprisingly, it was noticed that N atoms also existed in the form of molecular nitrogen, $N_2$, which is detrimental to the stability of the GST performance [3]. N-doped GST experimental features were also supported by ab-initio molecular dynamic calculations [2]. References [1] M.-C. Jung, Y. M. Lee, H.-D. Kim, M. G. Kim, and H. J. Shin, K. H. Kim, S. A. Song, H. S. Jeong, C. H. Ko, and M. Han, "Ge nitride formation in N-doped amorphous Ge2Sb2Te5", Appl. Phys. Lett. 91, 083514 (2007). [2] Zhimei Sun, Jian Zhou, Hyun-Joon Shin, Andreas Blomqvist, and Rajeev Ahuja, "Stable nitride complex and molecular nitrogen in N doped amorphous Ge2Sb2Te5", Appl. Phys. Lett. 93, 241908 (2008). [3] Kihong Kim, Ju-Chul Park, Jae-Gwan Chung, and Se Ahn Song, Min-Cherl Jung, Young Mi Lee, Hyun-Joon Shin, Bongjin Kuh, Yongho Ha, Jin-Seo Noh, "Observation of molecular nitrogen in N-doped Ge2Sb2Te5", Appl. Phys. Lett. 89, 243520 (2006).

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.5
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• pp.185-190
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• 2002

Capacitor material utilized in the downsizing passive devices and dynamic random access memory(DRAM) requires the physical and electrical properties at given area such as capacitor thickness reduction, relative dielectric constant increase, low leakage current and thermal stability. Common capacitor materials, $SiO_2$, $Si_3N_4$, $SiO_2$/$Si_3N_4$,TaN and et al., used until recently have reached their physical limits in their application to several hundred angstrom scale capacitor. $Ta_2O_{5}$ is known to be a good alternative to the existing materials for the capacitor application because of its high dielectric constant (25 ~35), low leakage current and high breakdown strength. Despite the numerous investigations of $Ta_2O_{5}$ material, there have little been established the clear understanding of the annealing effect on capacitance characteristic and conduction mechanism, design and fabrication for $Ta_2O_{5}$ film capacitor. This study presents the structure-property relationship of reactive-sputtered $Ta_2O_{5}$ MIM capacitor structure processed by annealing in a vacuum. X-ray diffraction patterns skewed the existence of amorphous phase in as-deposited condition and the formation of preferentially oriented-$Ta_2O_{5}$ in 670, $700^{\circ}C$ annealing. On 670, $700^{\circ}C$ annealing under the vacuum, the leakage current decrease and the enhanced temperature-capacitance characteristic stability. and the leakage current behavior is stable irrespective of applied electric field. The results states that keeping $Ta_2O_{5}$ annealed at vacuum gives rise to improvement of electrical characteristics in the capacitor by reducing oxygen-vacancy and the broken bond between Ta and O.