• Journal of Power Electronics
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• 제16권1호
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• pp.133-141
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• 2016

This paper focuses on the development of a Five-Level Flying-Capacitor Dual Buck Inverter (FLFCDBI) based on the main circuit of dual buck inverters. This topology has been described as not having any shoot-through problems, no body-diode reverse recovery problems and the half-cycle work mode found in the traditional Multi-Level Flying-Capacitor Inverter (MLFCI). It has been shown that the flying-capacitor voltages of this inverter can be regulated by the redundant state selection within one pole. The voltage balance of the flying-capacitors can be achieved by charging or discharging in the positive (negative) half cycles by choosing the proper logical algorithms. This system has a simple structure but demonstrates improved performance and reliability. The validity of this inverter is conformed through computer-aided simulation and experimental investigations.

• 전력전자학회논문지
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• 제27권2호
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• pp.134-141
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• 2022

This study presents a method for reducing current distortion that occurs when a dual-buck inverter generates reactive power. Dual-buck inverters, which are only capable of unity power factor operation, can generate reactive power capabilities by modifying a modulation technique. However, under non-unity power factor conditions, current distortion occurs at zero-crossing points of grid voltage and output current. This distortion is caused by parasitic capacitors, dead-time, and discontinuous conduction mode operation. This study proposes a modified modulation method to alleviate the current distortion at zero-crossing point of the grid voltage. A repetitive controller is applied to reduce this distortion of the output current. A 1 kVA prototype is built and tested. Simulation and experimental results demonstrate the effectiveness of the proposed method.

• 전력전자학회논문지
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• 제25권4호
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• pp.279-285
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• 2020

An open-end winding (OEW) permanent magnet synchronous motor with dual inverters can synthesize large voltages for a motor with the same DC link voltage. This ability has the advantage of reducing the use of DC/DC boost converters or high voltage batteries. However, zero-sequence voltage (ZSV), which is caused by the difference in the combined voltage between the primary and secondary inverters, can generate a zero-sequence current (ZSC) that increases system losses. Among the methods for eliminating this phenomenon, combining voltage vector eliminated ZSV cannot be accomplished by the conventional Pulse Width Modulation(PWM) method. In this study, a PWM carrier generation method using functionalization to generate a switching pattern to suppress ZSC is proposed and applied to analyze the control influence of the center-zero vector in the switching sequence about the current ripple.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 추계학술대회 논문집 학회본부
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• pp.268-270
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• 1995

In crane drives, DC motor has been most widely used due to simple control characteristic and favorable transient behavior. Nowadays, however, the squirrel cage induction motor is known as an attractive candidate due to elimination of all sliding electrical contacts, resulting in an exceedingly simple and rugged construction. Especially, in hoist application, the smooth torque control and four quadrant operation are essential. In this paper, an operation of dual inverters with common DC bus fed by vector controlled induction motor is described. Single DSP is employed as a main processor to control dual inverters and communicates each input/output signal with PLC. As well as giving a detailed expression, full simulation and experimental results are presented.

• Journal of Electrical Engineering and Technology
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• 제6권1호
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• pp.133-138
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• 2011

This paper proposes a simple but robust self-tuning fuzzy logic controller for the speed regulation of a dual star induction machine based on indirect field oriented control. For feed the two star of this machine, two voltage source inverters based on sinus-triangular pulse-width modulation techniques are introduced. The simulation results show the robustness and good performance of the proposed controller.

• Journal of Power Electronics
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• 제19권3호
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• pp.625-636
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• 2019

This paper proposes an active leakage magnetic field (LMF) suppression scheme, which uses the dual-transmitter (DT) topology, for EV wireless charging systems (EVWCS). The two transmitter coils are coplanar, concentric and driven by separate inverters. The LMF components generated by the three coils cancel each other out to reduce the total field strength. This paper gives a detailed theoretical analysis on the operating principles of the proposed scheme. Finite element analysis is used to simulate the LMF distribution patterns. Experimental results show that when there is no coil misalignment, 97% of the LMF strength can be suppressed in a 1kW prototype. These results also show that the impact on efficiency is small. The trade-off between LMF suppression and efficiency is revealed, and a control strategy to balance these two objectives is presented.

• 전력전자학회논문지
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• 제25권3호
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• pp.235-241
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• 2020

In this paper, we propose the bus/bypass synchronization phase lock loop (B-Sync PLL) method using each phase voltage controller of a parallel UPS inverter. The B-Sync PLL included in each phase voltage control system of parallel UPS inverters has the transient response and the phase synchronization error at grid normal or blackout. The validity of this method is verified by simulation and experiment. As a result, the parallel UPS inverters using the proposed method confirmed that the output phase was continuously synchronized when a grid blackout, improving the transient response characteristics for stable load power supply and equal load sharing.

• Journal of Power Electronics
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• 제19권2호
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• pp.454-462
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• 2019

When compared to traditional bridge-type inverters, the dual-buck inverter has a higher reliability due to the fact that its bridge legs do not have a shoot-through problem. In this paper, the working principle of the dual-buck inverter is analyzed. A comparison of the working modes under full-cycle and half-cycle control is discussed. With half-cycle control, the inverter can realize a higher efficiency. However, this results in current zero-crossing distortion. The corresponding control strategy of the dual-buck inverter is proposed in order to realize both high efficiency and low current harmonic distortion. In addition, the system stability is analyzed. Dead-time is unnecessary due to the advantages of the topology. Thus, the current harmonic distortion can be further reduced. An inverter with the proposed control strategy has the advantages of high reliability, high efficiency and low current harmonic distortion. Finally, simulation and experimental results are given to verify the theoretical analysis.

• 전기전자학회논문지
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• 제26권2호
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• pp.271-279
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• 2022

본 논문은 플로팅 커패시터를 갖는 이중 인버터의 향상된 데드 타임 보상 기법을 제안한다. 플로팅 커패시터를 갖는 이중 인버터는 2-레벨 단일 인버터보다 전력 반도체가 6개가 추가된다. 전력 반도체의 수가 증가로 이중 인버터의 출력 전압은 추가된 전력 반도체의 도통 전압만큼 감소되며 출력 전류 품질은 전력 반도체에 의한 전압 강하와 데드 타임에 의해 저하된다. 본 논문에서 제안하는 기법은 이중 인버터의 데드 타임 및 전력 반도체의 도통 전압을 보상하여 전류 품질을 개선하고 추가적인 대역통과 필터를 이용한 고조파 보상 기법을 통해 데드 타임과 도통 전압 보상에 대한 오차를 추가 보상한다.

• Journal of Power Electronics
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• 제16권4호
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• pp.1565-1577
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• 2016

For grid-connected LCL-filtered inverters, dual-loop current control with an inner-loop active damping (AD) based on capacitor current feedback is generally used for the sake of current quality. However, existing studies on capacitor current feedback AD with a control delay do not reveal the mathematical relation among the dual-loop stability, capacitor current feedback factor, delay time and LCL parameters. The robustness was not investigated through mathematical derivations. Thus, this paper aims to provide a systematic study of dual-loop current control in a digitally-controlled inverter. At first, the stable region of the inner-loop AD is derived. Then, the dual-loop stability and robustness are analyzed by mathematical derivations when the inner-loop AD is stable and unstable. Robust design principles for the inner-loop AD feedback factor and the outer-loop current controller are derived. Most importantly, ensuring the stability of the inner-loop AD is critical for achieving high robustness against a large grid impedance. Then, several improved approaches are proposed and synthesized. The limitations and benefits of all of the approaches are identified to help engineers apply capacitor current feedback AD in practice.