• Title/Summary/Keyword: Dual Converter

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A New ZCS PWM Boost Converter with operating Dual Converter (Dual 컨버터로 동작하는 새로운 ZCS PWM Boost Converter)

  • Kim Tea-Woo;Chin Gi-Ho;Kim Hack-Sung
    • Proceedings of the KIPE Conference
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    • 2002.07a
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    • pp.525-528
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    • 2002
  • A Novel Zero Current Switching(ZCS) Pulse Width Modulation(PWM) boost converter for reducing two rectifiers reverse recovery related losses Is proposed. The switches of the proposed converter are operating to work alternatively turn-on and turn-off with soft switching(ZVS, ZCS) condition. The reverse recovery related switching losses and EMI problems of the proposed converter eliminates the reverse recovery current of the freewheeling diode(D, Dl) by adding the resonant inductor Lr, in series with the switch S2. The voltage and current stresses of the components are similar to those in its conventional hard switching counterpats. As mentioned above, the characteristics are verified through experimental results.

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Design of DC-DC Boost Converter with RF Noise Immunity for OLED Displays

  • Kim, Tae-Un;Kim, Hak-Yun;Baek, Donkyu;Choi, Ho-Yong
    • Journal of Semiconductor Engineering
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    • v.3 no.1
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    • pp.154-160
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    • 2022
  • In this paper, we design a DC-DC boost converter with RF noise immunity to supply a stable positive output voltage for OLED displays. For RF noise immunity, an input voltage variation reduction circuit (IVVRC) is adopted to ensure display quality by reducing the undershoot and overshoot of output voltage. The boost converter for a positive voltage Vpos operates in the SPWM-PWM dual mode and has a dead-time controller using a dead-time detector, resulting in increased power efficiency. A chip was fabricated using a 0.18 um BCDMOS process. Measurement results show that power efficiency is 30% ~ 76% for load current range from 1 mA to 100 mA. The boost converter with the IVVRC has an overshoot of 6 mV and undershoot of 4 mV compared to a boost converter without that circuit with 18 mV and 20 mV, respectively.

A Design Method of Transformer Turns Ratio with the Loss Components Analysis of an Isolated Bidirectional DC-DC Converter (절연형 양방향 DC-DC 컨버터의 손실 성분 분석을 통한 변압기 권선비 설계 방법)

  • Jung, Jae-Hun;Kim, Hak-Soo;Nho, Eui-Cheol;Kim, Heung-Geun;Chun, Tae-Won
    • The Transactions of the Korean Institute of Power Electronics
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    • v.21 no.5
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    • pp.434-441
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    • 2016
  • This paper deals with transformer turns ratio design with the consideration of loss minimization in isolated bidirectional DC-DC converter. Generally, the rms value of current, magnitude of current at switching instance, and duty ratio of a converter vary according to the turns ratio of an isolation transformer in the converter under the same voltages and output power level. Therefore, the transformer turns ratio has an effect on the total loss in a converter. The switching and conduction losses of IGBTs and MOSFETs consisting of dual-active bridge converter are analyzed, and iron and copper losses in an isolation transformer and inductor are calculated. Total losses are calculated and measured in cases of four different transformer turns ratios through simulation and experiment with 3-kW converter, and an optimum turns ratio that provides minimum losses is found. The usefulness of the proposed transformer turns ratio design approach is verified through simulation and experimental results.

Dual-Output Single-Stage Bridgeless SEPIC with Power Factor Correction

  • Shen, Chih-Lung;Yang, Shih-Hsueh
    • Journal of Power Electronics
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    • v.15 no.2
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    • pp.309-318
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    • 2015
  • This study proposes a dual-output single-stage bridgeless single-ended primary-inductor converter (DOSSBS) that can completely remove the front-end full-bridge alternating current-direct current rectifier to accomplish power factor correction for universal line input. Without the need for bridge diodes, the proposed converter has the advantages of low component count and simple structure, and can thus significantly reduce power loss. DOSSBS has two uncommon output ports to provide different voltage levels to loads, instead of using two separate power factor correctors or multi-stage configurations in a single stage. Therefore, this proposed converter is cost-effective and compact. A magnetically coupled inductor is introduced in DOSSBS to replace two separate inductors to decrease volume and cost. Energy stored in the leakage inductance of the coupled inductor can be completely recycled. In each line cycle, the two active switches in DOSSBS are operated in either high-frequency pulse-width modulation pattern or low-frequency rectifying mode for switching loss reduction. A prototype for dealing with an $85-265V_{rms}$ universal line is designed, analyzed, and built. Practical measurements demonstrate the feasibility and functionality of the proposed converter.

Design of the dual-buoy wave energy converter based on actual wave data of East Sea

  • Kim, Jeongrok;Kweon, Hyuck-Min;Jeong, Weon-Mu;Cho, Il-Hyoung;Cho, Hong-Yeon
    • International Journal of Naval Architecture and Ocean Engineering
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    • v.7 no.4
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    • pp.739-749
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    • 2015
  • A new conceptual dual-buoy Wave Energy Converter (WEC) for the enhancement of energy extraction efficiency is suggested. Based on actual wave data, the design process for the suggested WEC is conducted in such a way as to ensure that it is suitable in real sea. Actual wave data measured in Korea's East Sea (position: $36.404N^{\circ}$ and $129.274E^{\circ}$) from May 1, 2002 to March 29, 2005 were used as the input wave spectrum for the performance estimation of the dual-buoy WEC. The suggested WEC, a point absorber type, consists of two concentric floating circular cylinders (an inner and a hollow outer buoy). Multiple resonant frequencies in proposed WEC affect the Power Ttake-off (PTO) performance of the WEC. Based on the numerical results, several design strategies are proposed to further enhance the extraction efficiency, including intentional mismatching among the heave natural frequencies of dual buoys, the natural frequency of the internal fluid, and the peak frequency of the input wave spectrum.

A New Active Lossless Snubber for Half-Bridge Dual Converter (하프 브릿지 듀얼 컨버터를 위한 새로운 능동형 무손실 스너버)

  • 한상규;윤현기;문건우;윤명중;김윤호
    • The Transactions of the Korean Institute of Power Electronics
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    • v.7 no.5
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    • pp.419-426
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    • 2002
  • A new active lossless snubber for half-bridge dual converter(that is called'dual converter') is proposed in this paper It features soft switching(ZVS) as well as turn-off snubbing in both main and auxiliary switches. Therefore, it helps the dual converter to operate at the higher frequency with a higher efficiency and smaller-sized reactive components. Moreover, since it uses parasitic components, such as leakage inductances and switch output capacitances etc, to achieve the ZVS of power switches, it has simpler structure and lower cost of production. The operational principle, theoretical analysis, and design consideration are presented. To confirm the operation, features, and validity of the proposed circuit, experimental results from a 200w, 24V/DC-200V/DC proto-type are presented.

A Time-to-Digital Converter Using Dual Edge Flip Flops for Improving Resolution (분해능 향상을 위해 듀얼 에지 플립플롭을 사용하는 시간-디지털 변환기)

  • Choi, Jin-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.23 no.7
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    • pp.816-821
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    • 2019
  • A counter-type time-to-digital converter was designed using a dual edge T flip-flop. The time-to-digital converter was designed with a $0.18{\mu}m$ CMOS process at a supply voltage of 1.5 volts. In a typical time-to-digital converter, when the period of the clock is T, a conversion error corresponding to the period of the clock occurs due to the asynchronism between the input signal and the clock. However, the clock of the time-to-digital converter proposed in this paper is generated in synchronization with the start signal which is the input signal. As a result, conversion errors that may occur due to asynchronization of the start signal and the clock do not occur. The flip-flops constituting the counters are composed of dual-edge flip-flops operating at the positive and negative edges of the clock to improve the resolution.

Modulation Technique of Dual Active Bridge Converter to Improve Efficiency of Smart Transformers in Railroad Traction System (철도차량용 지능형 변압기 손실 저감을 위한 Dual Active Bridge 컨버터의 Modulation 기법 연구)

  • Kim, Sungmin;Lee, Seung-Hwan;Kim, Myung-Yong
    • Journal of the Korean Society for Railway
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    • v.19 no.6
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    • pp.727-735
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    • 2016
  • Smart transformers are effective at reducing the weight and increasing the efficiency of traction systems for railroad applications. A smart transformer generally consists of rectifier modules and the Dual-Active-Bridge (DAB) converter modules. The efficiency of the smart transformer depends on not only the electrical characteristics, but also on the control method of the converter modules. Especially, a DAB converter has a high order degree of freedom of voltage modulation to control the power transferred through the high frequency transformer, and a voltage modulation method, are very critical for the efficiency of the DAB converter. This paper proposes a new voltage modulation method for the DAB converter to increase the efficiency in the low/medium power transfer condition. The proposed modulation method controls the reactive power in the high frequency transformer, making it zero. And, the switching loss is dramatically reduced by using the received converter module as a diode rectifier. The feasibility of the proposed modulation method is verified by computer simulation of the 900Vdc DAB converter power control.

A High-Efficiency High-Power Step-Up Converter with Low Ripple Content

  • Kang Jeong-il;Roh Chung-Wook;Moon Gun-Woo;Youn Myung-Joong
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.708-712
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    • 2001
  • A new phase-shifted parallel-input/series-output (PI SO) dual inductor-fed push-pull converter for high-power step­up applications is proposed. This converter is operated at a constant duty cycle and employs an auxiliary circuit to control the output voltage with a phase-shift between the two modules. It features a voltage conversion characteristic which is linear to changes in the control input, and high step-up ratio with a greatly reduced switch turn-off stress resulting in a significant increase in the converter efficiency. It also shows a low ripple content and low root-mean-square (RMS) current in the output capacitor. The operational principle is analyzed and a comparative analysis with the conventional pulse-width-modulated (PWM) PISO dual inductor-fed push-pull converter is presented. A 50kHz, 800W, 350Vdc prototype with an input of 20-32Vdc has also been constructed to validate the proposed converter. The proposed converter compares favorably with the conventional counterpart and is considered well suited to high-power step-up applications.

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A High-Power Step-up Converter with High Efficiency and Fast Control-to-Output Dynamics

  • Kang, Jeong-il;Roh, Chung-Wook;Moon, Gun-Woo;Youn, Myung-Joong
    • Journal of Power Electronics
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    • v.1 no.2
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    • pp.78-87
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    • 2001
  • A new high-power step-up based on the two-module parallel-input (PISO) modular dual inductor-fed push-pull converter is proposed. The proposed converter is operated at a constant duty cycle and employs and auxiliary circuit to control the output voltage with a phase-shift between two modules. It shows a high efficiency due to the greatly reduced switch turn-off stress. It also shows a high and linear voltage conversion ratio, low current stress in the output capacitor, and fast control-to-output dynamics. The operation principles and the mathematical models of the proposed converter are presented. Features of the proposed converter are discussed in comparison with the two-module PISO modular dual inductor-fed push-pull converter. Also, experimental results from a 50kHz, 800W, 350 Vdc prototype with an input voltage range of 20-32 Vdc are provided to confirm the validity of the proposed converter. The new converter compares favorably with the conventional counterpart, and is considered well siuted to high-power step-up applications.

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