• Title/Summary/Keyword: Drain engineering

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Optimization of Tunneling FET with Suppression of Leakage Current and Improvement of Subthreshold Slope (누설전류 감소 및 Subthreshold Slope 향상을 위한 Tunneling FET 소자 최적화)

  • Yoon, Hyun-kyung;Lee, Jae-hoon;Lee, Ho-seong;Park, Jong-tae
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.713-716
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    • 2013
  • The device performances of N-channel Tunneling FET have been characterized with different intrinsic length between drain and gate($L_{in}$), drain and source doping, permittivity and oxide thickness when the total effective channel length is constant. N-channel Tunneling FET of SOI structure have been used in characterization. $L_{in}$ was from 30nm to 70nm, dose concentration of drain and source were from $2{\times}10^{12}cm^{-2}$ to $2{\times}10^{15}cm^{-2}$ and from $1{\times}10^{14}cm^{-2}$ to $3{\times}10^{15}cm^{-2}$, permittivity was from 3.9 to 29, and oxide thickness was from 3nm to 9nm. The device performances were characterized by Subthreshold slope(S-slope), On/off ratio, and leakage current. From the simulation results, the leakage current have been reduced for long $L_{in}$ and low drain doping. S-slope have been reduced for high source doping, high permittivity and thin oxide thickness. With considering the leakage current and S-slope, it is desirable that are long $L_{in}$, low drain doping, high source doping, high permittivity and thin oxide thickness to optimize device performance in n-channel Tunneling FET.

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High Voltage β-Ga2O3 Power Metal-Oxide-Semiconductor Field-Effect Transistors (고전압 β-산화갈륨(β-Ga2O3) 전력 MOSFETs)

  • Mun, Jae-Kyoung;Cho, Kyujun;Chang, Woojin;Lee, Hyungseok;Bae, Sungbum;Kim, Jeongjin;Sung, Hokun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.32 no.3
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    • pp.201-206
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    • 2019
  • This report constitutes the first demonstration in Korea of single-crystal lateral gallium oxide ($Ga_2O_3$) as a metal-oxide-semiconductor field-effect-transistor (MOSFET), with a breakdown voltage in excess of 480 V. A Si-doped channel layer was grown on a Fe-doped semi-insulating ${\beta}-Ga_2O_3$ (010) substrate by molecular beam epitaxy. The single-crystal substrate was grown by the edge-defined film-fed growth method and wafered to a size of $10{\times}15mm^2$. Although we fabricated several types of power devices using the same process, we only report the characterization of a finger-type MOSFET with a gate length ($L_g$) of $2{\mu}m$ and a gate-drain spacing ($L_{gd}$) of $5{\mu}m$. The MOSFET showed a favorable drain current modulation according to the gate voltage swing. A complete drain current pinch-off feature was also obtained for $V_{gs}<-6V$, and the three-terminal off-state breakdown voltage was over 482 V in a $L_{gd}=5{\mu}m$ device measured in Fluorinert ambient at $V_{gs}=-10V$. A low drain leakage current of 4.7 nA at the off-state led to a high on/off drain current ratio of approximately $5.3{\times}10^5$. These device characteristics indicate the promising potential of $Ga_2O_3$-based electrical devices for next-generation high-power device applications, such as electrical autonomous vehicles, railroads, photovoltaics, renewable energy, and industry.

Organic field-effect transistors with step-edge structure

  • Kudo, Kazuhiro
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.91-93
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    • 2008
  • The organic field-effect transistors with step-edge structure were fabricated. Source and drain electrodes were obliquely deposited by vacuum evaporation. The step-edge of the gate electrode serve as a shadow mask, and the short channel is formed at the step-edge. The excellent device performances were obtained.

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Optimization of Harmonic Tuning Circuit vary as Drain Voltage of Class F Power Amplifier (Class F 전력 증폭기의 드레인 전압 변화에 따른 고조파 조정 회로의 최적화)

  • Lee, Chong-Min;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.46 no.1
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    • pp.102-106
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    • 2009
  • This paper presents the design and optimization of output matching network according to envelope for class F power amplifier(PA) which is to apply to envelope elimination and restoration(EER) transmitter. In this paper, to increase the PAE of class F power amplifier which applies to EER transmitter, the varactor diode has been used on output matching network. As envelope changes, it optimizes constitution of harmonic trap that is short circuit in 2nd-harmonic and is open circuit in 3rd-harmonic. When drain voltage changes from 25 V to 30 V, some percentage is improved in the PAE.put the abstract of paper here.

Experimental and Simulation Study of Barrier Properties in Schottky Barrier Thin-Film Transistors with Cr- and Ni- Source/Drain Contacts (Cr- 및 Ni- 소스/드레인 쇼트키 박막 트랜지스터의 장벽 특성에 대한 실험 및 모델링 연구)

  • Jung, Ji-Chul;Moon, Kyoung-Sook;Koo, Sang-Mo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.10
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    • pp.763-766
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    • 2010
  • By improving the conducting process of metal source/drain (S/D) in direct contact with the channel, schottky barrier metal-oxide-semiconductor field effect transistors (SB MOSFETs) reveal low extrinsic parasitic resistances, offer easy processing and allow for well-defined device geometries down to the smallest dimensions. In this work, we investigated the arrhenius plots of the SB MOSFETs with different S/D schottky barrier (SB) heights between simulated and experimental current-voltage characteristics. We fabricated SB MOSFETs using difference S/D metals such as Cr (${\Phi}_{Cr}$ ~4.5 eV) and Ni (${\Phi}_{Ni}$~5.2 eV), respectively. Schottky barrier height (${\Phi}_B$) of the fabricated devices were measured to be 0.25~0.31 eV (Cr-S/D device) and 0.16~0.18 eV (Ni-S/D device), respectively in the temperature range of 300 K and 475 K. The experimental results have been compared with 2-dimensional simulations, which allowed bandgap diagram analysis.

Performance Optimization of LDMOS Transistor with Dual Gate Oxide for Mixed-Signal Applications

  • Baek, Ki-Ju;Kim, Yeong-Seuk;Na, Kee-Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.5
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    • pp.254-259
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    • 2015
  • This paper reports the optimized mixed-signal performance of a high-voltage (HV) laterally double-diffused metaloxide-semiconductor (LDMOS) field-effect transistor (FET) with a dual gate oxide (DGOX). The fabricated device is based on the split-gate FET concept. In addition, the gate oxide on the source-side channel is thicker than that on the drain-side channel. The experiment results showed that the electrical characteristics are strongly dependent on the source-side channel length with a thick gate oxide. The digital and analog performances according to the source-side channel length of the DGOX LDMOS device were examined for circuit applications. The HV DGOX device with various source-side channel lengths showed reduced by maximum 37% on-resistance (RON) and 50% drain conductance (gds). Therefore, the optimized mixed-signal performance of the HV DGOX device can be obtained when the source-side channel length with a thick gate oxide is shorter than half of the channel length.

Influence of Perfluorinated Polymer Passivation on AlGaN/GaN High-electron-mobility Transistors (질화갈륨계 고전자이동도 트랜지스터에 대한 불소계 고분자 보호막의 영향)

  • Jang, Soohwan
    • Korean Chemical Engineering Research
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    • v.48 no.4
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    • pp.511-514
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    • 2010
  • Perfluorinated polymer($Cytop^{TM}$) was deposited on selective area of AlGaN/GaN HEMT structure using low cost and simple spin-coating method, and the electrical characteristics of the device was analyzed for application of passivation layer on semiconductors. Gate lag measurement results of $Cytop^{TM}$ passivated and unpassivated HEMT were compared. Passivated device shows improved 65 % pulsed drain current of dc mode value. Rf measurements were also performed. $Cytop^{TM}$ passivated HEMT have similar rf performance to PECVD grown $Si_3N_4$ passivated device. $Cytop^{TM}$ passivation layer may play an important role in mitigating surface state trapping in the region between gate and drain.

Random Dopant Fluctuation Effects of Tunneling Field-Effect Transistors (TFETs) (터널링 전계효과 트랜지스터의 불순물 분포 변동 효과)

  • Jang, Jung-Shik;Lee, Hyun Kook;Choi, Woo Young
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.12
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    • pp.179-183
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    • 2012
  • The random dopant fluctuation (RDF) effects of tunneling field-effect transistors (TFETs) have been observed by using atomistic 3-D device simulation. Due to extremely low body doping concentration, the RDF effects of TFETs have not been seriously investigated. However, in this paper, it has been found that the randomly generated and distributed source dopants increase the variation of threshold voltage ($V_{th}$), drain induced current enhancement (DICE) and subthreshold slope (SS) of TFETs. Also, some ways of relieving the RDF effects of TFETs have been presented.

Effect of Leakage on the Noise Reduction Characteristics of Helmholtz Resonator (누출이 헬름홀츠 공명기의 소음저감 특성에 미치는 영향)

  • Lee, Il-Jae
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.19 no.6
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    • pp.634-640
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    • 2009
  • Helmholtz resonator has been used, especially in intake and exhaust systems of vehicles, due to its good noise reduction characteristics at low frequencies. Many approaches have been developed to predict the acoustic behavior of the resonator with the assumption that there is no leakage from the resonator. However, its behavior may be affected by leakage which may exist in manufacturing processes or on purpose. This study investigates the effect of leakage on the noise reduction characteristics of Helmholtz resonator with two practical examples. One is a resonator with a gap between baffle and housing of the resonator and the other one is a resonator with two drain holes on the baffle. The measured transmission loss shows that the resonance frequencies are considerably shifted to higher frequency due to the leakage. The Boundary Element Method was applied to predict the transmission loss of the Helmholtz resonator with drain holes. The comparison between the measured and predicted transmission loss shows that the acoustic impedance of the holes is essential for accurate predictions of the transmission loss.