• Title/Summary/Keyword: Drain Bias

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The Design and implementation of a 5.8GHz band LNA MMIC for Dedicated Short Range Communication (단거리전용통신을 위한 5.8GHz대역 LNA MMIC 설계 및 구현)

  • 문태정;황성범;김용규;송정근;홍창희
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.8
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    • pp.549-554
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    • 2003
  • In this paper, we have designed and implemented by a monolithic microwave integrated circuit(MMIC) of a 5.8GHz-band low noise amplifier (LNA) composed of receiver front-end(RFE) in a on-board equipment system for dedicated short range communication. The designed LNA is provided with two active devices, matching circuits, and two drain bias circuits. Operating at a single supply of 3V and a consumption current of 18mA, The gain at center frequency 5.8GHz is 13.4dB, NF is 1.94dB, Input IP3 is -3dBm, S$_{11}$ is -18dB, and S$_{22}$ is -13.3dB. The circuit size is 1.2 $\times$ 0.7 $\textrm{mm}^2$.>.

Poly-gate Quantization Effect in Double-Gate MOSFET (폴리 게이트의 양자효과에 의한 Double-Gate MOSFET의 특성 변화 연구)

  • 박지선;이승준;신형순
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.8
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    • pp.17-24
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    • 2004
  • Quantum effects in the poly-gate are analyzed in two dimensions using the density-gradient method, and their impact on the short-channel effect of double-gate MOSFETs is investigated. The 2-D effects of quantum mechanical depletion at the gate to sidewall oxide is identified as the cause of large charge-dipole formation at the corner of the gate. The bias dependence of the charge dipole shows that the magnitude of the dipole peak-value increases in the subthreshold region and there is a large difference in carrier and potential distribution compared to the classical solution. Using evanescent-nude analysis, it is found that the quantum effect in the poly-gate substantially increases the short-channel effect and it is more significant than the quantum effect in the Si film. The penetration of potential contours into the poly-gate due to the dipole formation at the drain side of the gate corner is identified as the reason for the substantial increase in short-channel effects.

Enhancement of On-Resistance Characteristics Using Charge Balance Analysis Modulation in a Trench Filling Super Junction MOSFET

  • Geum, Jongmin;Jung, Eun Sik;Kim, Yong Tae;Kang, Ey Goo;Sung, Man Young
    • Journal of Electrical Engineering and Technology
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    • v.9 no.3
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    • pp.843-847
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    • 2014
  • In Super Junction (SJ) MOSFETs, charge balance is the most important issue of the SJ fabrication process. In order to achieve the best electrical characteristics, such as breakdown voltage and on-resistance, the N-type and P-type drift regions must be fully depleted when the drain bias approaches the breakdown voltage, which is known as the charge balance condition. In conventional charge balance analysis, based on multi-epi process SJ MOSFETs, analytical model has only N, P pillar width and doping concentration parameter. But applying a conventional charge balance principle to trench filling process, easier than Multi-epi process, is impossible due to the missing of the trench angle parameter. To achieve much more superior characteristics of on-resistance in trench filling SJ MOFET, the appropriate trench angle is necessary. So in this paper, modulated charge balance analysis is proposed, in which a trench angle parameter is added. The proposed method is validated using the TCAD simulation tool.

Organic Thin Film Transistor Fabricated with Soluble Pentacene Active Channel Layer and NiOx Electrodes

  • Han, Jin-Woo;Kim, Young-Hwan;Kim, Byoung-Yong;Han, Jeong-Min;Moon, Hyun-Chan;Park, Kwang-Bum;Seo, Dae-Shik
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.395-395
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    • 2007
  • We report on the fabrication of soluble pentacene-based thin-film transistors (TFTs) that consist of $NiO_x$, poly-vinyl phenol (PVP), and Ni for the source-drain (SID) electrodes, gate dielectric, and gate electrode, respectively. The $NiO_x$ SID electrodes of which the work function is well matched to that of soluble pentacene are deposited on a soluble pentacenechannel by sputter deposited of NiO powder and show a moderately low but still effective transmittance of ~65% in the visible range along with a good sheet resistance of ${\sim}40{\Omega}/{\square}$. The maximum saturation current of our soluble pentacene-based TFT is about $15{\mu}A$ at a gate bias of -40showing a high field effect mobility of $0.06cm^2/Vs$ in the dark, and the on/off current ratio of our TFT is about $10^4$. It is concluded that jointly adopting $NiO_x$ for the S/D electrodes and PVP for gate dielectric realizes a high-quality soluble pentacene-based TFT.

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Large Size and High Resolution Organic Light Emitting Diodes Based on the In-Ga-Zn-O Thin Film Transistors with a Coplanar Structure

  • Hong Jae Shin
    • Korean Journal of Materials Research
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    • v.33 no.12
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    • pp.511-516
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    • 2023
  • Amorphous In-Ga-Zn-O (a-IGZO) thin film transistors (TFTs) with a coplanar structure were fabricated to investigate the feasibility of their potential application in large size organic light emitting diodes (OLEDs). Drain currents, used as functions of the gate voltages for the TFTs, showed the output currents had slight differences in the saturation region, just as the output currents of the etch stopper TFTs did. The maximum difference in the threshold voltages of the In-Ga-Zn-O (a-IGZO) TFTs was as small as approximately 0.57 V. After the application of a positive bias voltage stress for 50,000 s, the values of the threshold voltage of the coplanar structure TFTs were only slightly shifted, by 0.18 V, indicative of their stability. The coplanar structure TFTs were embedded in OLEDs and exhibited a maximum luminance as large as 500 nits, and their color gamut satisfied 99 % of the digital cinema initiatives, confirming their suitability for large size and high resolution OLEDs. Further, the image density of large-size OLEDs embedded with the coplanar structure TFTs was significantly enhanced compared with OLEDs embedded with conventional TFTs.

Current-Voltage Characteristics with Substrate Bias in Nanowire Junctionless MuGFET (기판전압에 따른 나노와이어 Junctionless MuGFET의 전류-전압 특성)

  • Lee, Jae-Ki;Park, Jong-Tae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.4
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    • pp.785-792
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    • 2012
  • In this paper, a current-voltage characteristics of n-channel junctionless and inversion mode(IM) MuGFET, and p-channel junctionless and accumulation mode(AM) MuGFET has been measured and analyzed for the application in high speed and low power switching devices. From the variation of the threshold voltage and the saturation drain current with the substrate bias voltages, their variations in IM devices are larger than junctionless devices for n-channel devices, but their variations in junctioness devices are larger than AM devices for p-channel devices. The variations of transconductance with substrate biases are more significant in p-channel devices than n-channel devices. From the characteristics of subthreshold swing, it was observed that the S value is almost independent on the substrate biases in n-channel devices and p-channel junctionless devices but it is increased with the increase of the substrate biases in p-channel AM devices. For the application in high speed and low power switching devices using the substrate biases, IM device is better than junctionless devices for n-channel devices and junctionless device is better than AM devices for p-channel devices.

Bias and Gate-Length Dependent Data Extraction of Substrate Circuit Parameters for Deep Submicron MOSFETs (Deep Submicron MOSFET 기판회로 파라미터의 바이어스 및 게이트 길이 종속 데이터 추출)

  • Lee Yongtaek;Choi Munsung;Ku Janam;Lee Seonghearn
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.12
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    • pp.27-34
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    • 2004
  • The study on the RF substrate circuit is necessary to model RF output characteristics of deep submicron MOSFETs below 0.2$\mum$ gate length that have bun commercialized by the recent development of Si submicron process. In this paper, direct extraction methods are developed to apply for a simple substrate resistance model as well as another substrate model with connecting resistance and capacitance in parallel. Using these extraction methods, better agreement with measured Y22-parameter up to 30 GHz is achieved for 0.15$\mum$ CMOS device by using the parallel RC substrate model rather than the simple resistance one, demonstrating the RF accuracy of the parallel model and extraction technique. Using this model, bias and gate length dependent curves of substrate parameters in the RF region are obtained by increasing drain voltage of 0 to 1.2V at deep submicron devices with various gate lengths of 0.11 to 0.5㎛ These new extraction data will greatly contribute to developing a scalable RF nonlinear substrate model.

Advanced Hybrid EER Transmitter for WCDMA Application Using Efficiency Optimized Power Amplifier and Modified Bias Modulator (효율이 특화된 전력 증폭기와 개선된 바이어스 모듈레이터로 구성되는 진보된 WCDMA용 하이브리드 포락선 제거 및 복원 전력 송신기)

  • Kim, Il-Du;Woo, Young-Yun;Hong, Sung-Chul;Kim, Jang-Heon;Moon, Jung-Hwan;Jun, Myoung-Su;Kim, Jung-Joon;Kim, Bum-Man
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.8
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    • pp.880-886
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    • 2007
  • We have proposed a new "hybrid" envelope elimination and restoration(EER) transmitter architecture using an efficiency optimized power amplifier(PA) and modified bias modulator. The efficiency of the PA at the average drain voltage is very important for the overall transmitter efficiency because the PA operates mostly at the average power region of the modulation signal. Accordingly, the efficiency of the PA has been optimized at the region. Besides, the bias modulator has been accompanied with the emitter follower for the minimization of memory effect. A saturation amplifier, class $F^{-1}$ is built using a 5-W PEP LDMOSFET for forward-link single-carrier wideband code-division multiple-access(WCDMA) at 1-GHz. For the interlock experiment, the bias modulator has been built with the efficiency of 64.16% and peak output voltage of 31.8 V. The transmitter with the proposed PA and bias modulator has been achieved an efficiency of 44.19%, an improvement of 8.11%. Besides, the output power is enhanced to 32.33 dBm due to the class F operation and the PAE is 38.28% with ACLRs of -35.9 dBc at 5-MHz offset. These results show that the proposed architecture is a very good candidate for the linear and efficient high power transmitter.

AlGaN/GaN Field Effect Transistor with Gate Recess Structure and HfO2 Gate Oxide (게이트 하부 식각 구조 및 HfO2 절연층이 도입된 AlGaN/GaN 기반 전계 효과 트랜지스터)

  • Kim, Yukyung;Son, Juyeon;Lee, Seungseop;Jeon, Juho;Kim, Man-Kyung;Jang, Soohwan
    • Korean Chemical Engineering Research
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    • v.60 no.2
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    • pp.313-319
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    • 2022
  • AlGaN/GaN based HfO2 MOSHEMT (metal oxide semiconductor high electron transistor) with different gate recess depth was simulate to demonstrate a successful normally-off operation of the transistor. Three types of the HEMT structures including a conventional HEMT, a gate-recessed HEMT with 3 nm thick AlGaN layer, and MIS-HEMT without AlGaN layer in the gate region. The conventional HEMT showed a normally-on characteristics with a drain current of 0.35 A at VG = 0 V and VDS = 15 V. The recessed HEMT with 3 nm AlGaN layer exhibited a decreased drain current of 0.15 A under the same bias condition due to the decrease of electron concentration in 2DEG (2-dimensional electron gas) channel. For the last HEMT structure, distinctive normally- off behavior of the transistor was observed, and the turn-on voltage was shifted to 0 V.

Electrical response of tungsten diselenide to the adsorption of trinitrotoluene molecules (폭발물 감지 시스템 개발을 위한 TNT 분자 흡착에 대한 WSe2 소자의 전기적 반응 특성 평가)

  • Chan Hwi Kim;Suyeon Cho;Hyeongtae Kim;Won Joo Lee;Jun Hong Park
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.33 no.6
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    • pp.255-260
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    • 2023
  • As demanding the detection of explosive molecules, it is required to develop rapidly and precisely responsive sensors with ultra-high sensitivity. Since two-dimensional semiconductors have an atomically thin body nature where mobile carriers accumulate, the abrupt modulation carrier in the thin body channel can be expected. To investigate the effectiveness of WSe2 semiconductor materials as a detection material for TNT (Trinitrotoluene) explosives, WSe2 was synthesized using thermal chemical vapor deposition, and afterward, WSe2 FETs (Field Effect Transistors) were fabricated using standard photo-lithograph processes. Raman Spectrum and FT-IR (Fourier-transform infrared) spectroscopy reveal that the adsorption of TNT molecules induces the structural transition of WSe2 crystalline. The electrical properties before and after adsorption of TNT molecules on the WSe2 surface were compared; as -50 V was applied as the back gate bias, 0.02 μA was recorded in the bare state, and the drain current increased to 0.41 μA with a dropping 0.6% (w/v) TNT while maintaining the p-type behavior. Afterward, the electrical characteristics were additionally evaluated by comparing the carrier mobility, hysteresis, and on/off ratio. Consequently, the present report provides the milestone for developing ultra-sensitive sensors with rapid response and high precision.