• Title/Summary/Keyword: Digital-to-Analog-Converter

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Design of a Low-Power 8-bit 1-MS/s CMOS Asynchronous SAR ADC for Sensor Node Applications (센서 노드 응용을 위한 저전력 8비트 1MS/s CMOS 비동기 축차근사형 ADC 설계)

  • Jihun Son;Minseok Kim;Jimin Cheon
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.16 no.6
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    • pp.454-464
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    • 2023
  • This paper proposes a low-power 8-bit asynchronous SAR ADC with a sampling rate of 1 MS/s for sensor node applications. The ADC uses bootstrapped switches to improve linearity and applies a VCM-based CDAC switching technique to reduce the power consumption and area of the DAC. Conventional synchronous SAR ADCs that operate in synchronization with an external clock suffer from high power consumption due to the use of a clock faster than the sampling rate, which can be overcome by using an asynchronous SAR ADC structure that handles internal comparisons in an asynchronous manner. In addition, the SAR logic is designed using dynamic logic circuits to reduce the large digital power consumption that occurs in low resolution ADC designs. The proposed ADC was simulated in a 180-nm CMOS process, and at a 1.8 V supply voltage and a sampling rate of 1 MS/s, it consumed 46.06 𝜇W of power, achieved an SNDR of 49.76 dB and an ENOB of 7.9738 bits, and obtained a FoM of 183.2 fJ/conv-step. The simulated DNL and INL are +0.186/-0.157 LSB and +0.111/-0.169 LSB.

Design of a CMOS D/A Converter for advanced wireless transceiver of high speed and high resolution (고속 고해상도의 무선통신 송 $\cdot$ 수신기용 CMOS D/A 변환기 설계)

  • Cho Hyun-Ho;Park Cheong-Yong;Yune Gun-Shik;Ha Sung-Min;Yoon Kwang-Sub
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.549-552
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    • 2004
  • The thesis describes the design of 12bit digital-to-analog converter (DAC) which shows the conversion rate of 500MHz and the power supply of 3.3V with 0.35${\mu}m$ CMOS 1-poly 4-metal process for advanced wireless transceiver of high speed and high resolution. The proposed DAC employes segmented structure which consists of 6bit MSB, 3bit mSB, 3bit LSB for area efficiency Also, using a optimized aspect ratio of process and new triple diagonal symmetric centroid sequence for high yield and high linearity. The proposed 12bit current mode DAC was employs new deglitch circuit for the decrement of the glitch energy. Simulation results show the conversion rate of 500MHz, and the power dissipation of 85mW at single 3.3V supply voltage. Both DNL and INL are found to be smaller than ${\pm}0.65LSB/{\pm}0.8LSB$.

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A study on Computer-controlled Ultrasonic Scanning Device (컴퓨터제어에 의한 자동초음파 탐상장치에 관한 연구)

  • Huh, H.;Park, C.S.;Hong, S.S.;Park, J.H.
    • Journal of the Korean Society for Nondestructive Testing
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    • v.9 no.1
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    • pp.30-38
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    • 1989
  • Since the nuclear power plants in Korea have been operated in 1979, the nondestructive testing (NDT) of pressure vessels and/or piping welds plays an important role for maintaining the safety and integrity of the plants. Ultrasonic method is superior to the other NDT method in the viewpoint of the detectability of small flaw and accuracy to determine the locations, sizes, orientations, and shapes. As the service time of the nuclear power plants is increased, the radiation level from the components is getting higher. In order to get more quantitative and reliable results and secure the inspector from the exposure to high radiation level, automation of the ultrasonic equipments has been one of the important research and development(R & D) subject. In this research, it was attempted to visualize the shape of flaws presented inside the specimen using a Modified C-Scan technique. In order to develope Modified C-Scan technique, an automatic ultrasonic scanner and a module to control the scanner were designed and fabricated. IBM-PC/XT was interfaced to the module to control the scanner. Analog signals from the SONIC MARK II were digitized by Analog-Digital Converter(ADC 0800) for Modified C-Scan display. A computer program has been developed and has capability of automatic data acquisition and processing from the digital data, which consist of maximum amplitudes in each gate range and locations. The data from Modified C-Scan results was compared with shape from artificial defects using the developed system. Focal length of focused transducer was measured. The automatic ultrasonic equipment developed through this study is essential for more accurate, reliable, and repeatable ultrasonic experiments. If the scanner are modified to meet to appropriate purposes, it can be applied to automation of ultrasonic examination of nuclear power plants and helpful to the research on ultrasonic characterization of the materials.

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Design of a 6bit 800MS/s CMOS A/D Converter Using Synchronizable Error Correction Circuit (동기화 기능을 가지는 오차보정회로를 이용한 6비트 800MS/s CMOS A/D 변환기 설계)

  • Kim, Won;Seon, Jong-Kug;Yoon, Kwang-Sub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.5A
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    • pp.504-512
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    • 2010
  • The paper proposes the 6bit 800MS/s flash A/D converter that can be applied to wireless USB chip-set. The paper simplified the error correction circuit and synchronization block as one circuit which are used respectively, and furthermore reduced the burden on the hardware. Comparing to the conventional error correction circuit, the proposed error correction circuit in this paper reduced 5 MOS transistors, the area of each error correction circuit is reduced by 9%. The A/D converter is fabricated with 0.18um CMOS 1-poly 6-metal process, and power dissipation is 182mW at 0.8Vpp input range and 1.8V supply voltage. The measured result shows 4.0bit of ENOB at 800MS/s conversion rate and 128.1MHz input frequency.

Design and Fabrication of an L-Band Digital TR Module for Radar (레이다용 L대역 디지털 송수신모듈 설계 및 제작)

  • Lim, Jae-Hwan;Park, Se-Jun;Jun, Sang-Mi;Jin, Hyung-Suk;Kim, Kwan-Sung;Kim, Tae-Hun;Kim, Jae-Min
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.29 no.11
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    • pp.857-867
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    • 2018
  • Active array radar is evolving into digital active array radar. Digital active array radar has many advantages for making several simultaneous radar beams from the digital receive data of each element. A digital-type transceiver(TR) module is suitable for this goal in radar. In this work, the design results of an L-band digital TR module are presented to verify the possibility of fabrication for a digital active array antenna. This L-band digital TR module consists of a gallium-nitride-type HPA to achieve a more than 350-W peak output power and one-chip transceivers that include a digital waveform generator and analog digital converter. The receiving gain was 47 dB, the noise figure was less than 2 dB, and the final output type of the four channel receiving paths was one optic signal.

A 0.4-2GHz, Seamless Frequency Tracking controlled Dual-loop digital PLL (0.4-2GHz, Seamless 주파수 트래킹 제어 이중 루프 디지털 PLL)

  • Son, Young-Sang;Lim, Ji-Hoon;Ha, Jong-Chan;Wee, Jae-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.12
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    • pp.65-72
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    • 2008
  • This paper proposes a new dual-loop digital PLL(DPLL) using seamless frequency tracking methods. The dual-loop construction, which is composed of the coarse and fine loop for fast locking time and a switching noise suppression, is used successive approximation register technique and TDC. The proposed DPLL in order to compensate the quality of jitter which follows long-term of input frequency is newly added cord conversion frequency tracking method. Also, this DPLL has VCO circuitry consisting of digitally controlled V-I converter and current-control oscillator (CCO) for robust jitter characteristics and wide lock range. The chip is fabricated with Dongbu HiTek $0.18-{\mu}m$ CMOS technology. Its operation range has the wide operation range of 0.4-2GHz and the area of $0.18mm^2$. It shows the peak-to-peak period jitter of 2 psec under no power noise and the power dissipation of 18mW at 2GHz through HSPICE simulation.

Design and Development of Meteorological Data Logger

  • Ng, Yin-Yeo;Park, Soo-Hong
    • Journal of information and communication convergence engineering
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    • v.8 no.6
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    • pp.671-676
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    • 2010
  • In this paper, an effort has been made to design and develop a meteorological data logger for meteorological purpose. This data logger is proposed to be included various sensor interface that used in weather sensors. Besides, numbers of meteorological process libraries are added into this data logger to make it able to perform as unattended weather monitoring system. Data output of this data logger are also design to support multiple protocol that commonly used in data logger, and several communication devices that commonly used in the market. Each data that logged will be logged together with date and time and able to retrieve via serial port using hyper terminal. It is also configurable via serial port.

A Multi-bit VCO-based Linear Quantizer with Frequency-to-current Feedback using a Switched-capacitor Structure

  • Park, Sangyong;Ryu, Hyuk;Sung, Eun-Taek;Baek, Donghyun
    • IEIE Transactions on Smart Processing and Computing
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    • v.4 no.3
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    • pp.145-148
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    • 2015
  • In this letter, we present a new linearization method for a voltage controlled oscillator (VCO)-based quantizer in an analog-to-digital converter (ADC). The nonlinearity of the VCO generates unwanted harmonic spurs and reduces the signal-to-noise and distortion ratio (SNDR) of the VCO-based quantizer. This letter suggests a frequency-to-current feedback method to effectively suppress harmonic distortion. The proposed method decreases the harmonic spurs by more than 53 dB. And a VCO-based quantizer employing the proposed linearization method achieves a high SNDR of 74.1 dB.

Simulation of the control force of the light aircraft using flight test data (비행시험 자료를 이용한 경항공기의 조종력 시뮬레이션)

  • 김정환;황명신;이정훈
    • 제어로봇시스템학회:학술대회논문집
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    • 1996.10b
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    • pp.203-206
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    • 1996
  • The purpose of this paper is to find how to determine the parameters of the basic control system design such as hinge moment coefficients and to display the controllability of the ChangCong-91. Since the estimation from the flight test of real aircraft is the most reliable, we performed the flight test of ChangGong-91 to get the various parameters such as velocity, height, control force, control surface deflection, 3 axis acceleration, 3 axis angular rate, pitch angle, angle of attack temperature and so on. We recorded the flight test data in VHS tapes and stored them to personal computer using A/D(analog to digital) converter. Flight test was done in various conditions, and the acquired data was processed with parameter identification method such as least square method. These data will be utilized for the development of Autopilot System design and Control Loading System design.

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Compensation of Timing Offset and Frequency Offset in the Multi-Band Receiver with Sub-Sampling Method (Sub-Sampling 방식의 다중 대역 수신기에서 타이밍 오프셋과 주파수 오프셋 보상)

  • Lee, Hui-Kyu;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.5
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    • pp.501-509
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    • 2011
  • Software defined radio(SDR) has a goal that places the analog-to-digital converter(ADC) as near the antenna as possible. But current technique actually can't do analog-to-digital converting about RF band signals. So one method is studying that samples RF band signals to IF band. One of the ways Sub-Sampling technique can convert signals from RF band to IF band without oscillator. If Sub-Sampling technique is used, over 2 bands can convert signals from RF band to IF band. But due to the filter performance in RF band, it is possible to generate interference between signals that is converted in low frequency band. The effect degrades performance. In this paper, we propose one method that uses time division multiplexing(TDM) method as a solution to avoid interference between signals. By doing TDM and Sub-Sampling at the same time that method can get signals without large changes of structures.