References
- Minjae Lee and Asad A. Abidi, "A 9b, 1.25 ps resolution coarse-fine time-to-digital converter in 90 nm CMOS that amplifies a time residue", IEEE J. Solid-State Circuits, vol. 43, no. 4, pp. 769-777, Apr. 2008. https://doi.org/10.1109/JSSC.2008.917405
- J. Kim, T. Jang, T. Yoon, and S. Cho, "Analysis and design of voltage-controlled oscillator based analogto-digital converter," IEEE Circuits and Syst. I. Regular Papers, vol. 57, no. 1, pp. 18-30, 2010. https://doi.org/10.1109/TCSI.2009.2018928
-
J. Hamilton, S. Yan, and T.R. Viswanathan, "A discrete-time input
${\Delta}$ ${\Sigma}$ quantizer Architecture using a dual-VCO-based integrator," IEEE Trans. Circuits and Syst. II. Express Briefs, vol. 57, no. 11, pp. 848-852, 2010. https://doi.org/10.1109/TCSII.2010.2068111 - Y. G. Yoon, M. C. Cho, and S. Cho, "A linearization technique for voltage controlled oscillator-based quantizer,' in Proc. International SoC Design Conference (ISOCC), 2009, pp. 317-320.
- A. Iwata, N. Sakimura, M. Nagata, and T. Morie, "The architecture of delta sigma analog-to-digital converters using a voltage-controlled oscillator as a multibit quantizer," IEEE Trans. Circuits and Syst. II, Analog and Digital Signal Processing, vol. 46, no.7, pp. 941-945, 1999. https://doi.org/10.1109/82.775391
- M. Z. Straayer, and M. H. Perrott, "A 12-Bit, 10-MHz bandwidth, continuous-time delta-sigma quantizer with a 5-bit, 950-MS/s VCO-based quantizer," IEEE J. Solid-State Circuits, vol. 43, no. 4, pp. 805-814, 2008. https://doi.org/10.1109/JSSC.2008.917500
- N. Sasidhar, R. Inti, and P. Hanumolu, "Low-noise self-referenced CMOS oscillator," Electronics letters, vol. 45, no. 18, pp. 920-9212, 2009. https://doi.org/10.1049/el.2009.1342
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