• Title/Summary/Keyword: Digital instrumentation and control

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A Frequency Model of OCXO for Holdover Mode of DP-PLL (DP-PLL의 Holdover 모드에 대한 OCXO의 주파수 모델)

  • Han, Wook;Hwang, Jin-Kwon;Kim, Yung-Kwon
    • Journal of IKEEE
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    • v.4 no.2 s.7
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    • pp.266-273
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    • 2000
  • A frequency model of an OCXO (Oven Controlled X-tal Oscillator) is suggested to implement a holdover algorithm in a DP-PLL (Digital Processing-Phase Locked Loop) system. This model is presented simply with second order polynomials with respect to temperature and aging of the OCXO. The model parameters are obtained from experimental data by applying the LSM (Least Squared Method). A holdover algorithm is also suggest using the frequency model. The obtained model is verified to simulate the holdover algorithm with experimental phase data due to variation of temperature.

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Adjustable Phase, Discrete Time Sinewave Generator

  • Klunium, Sawitree;Praesombool, Sukunya;Hinjit, Watcharapong;Yimman, Surapun;Dejhan, Kobchai
    • 제어로봇시스템학회:학술대회논문집
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    • 2004.08a
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    • pp.277-281
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    • 2004
  • The following paper proposes the new design of digital sine wave generator which allows users to define the phase shift of the out put sinewave according to user's demands. This new sinewave generator will have 2 outputs, cos(${\omega}_0n$) and cos(${\omega}_0n$+${\phi}$) The design of the new system starts from the construction of discrete time system with impulse response as cos(${\omega}_0n$) in a pair of conjugate complex poles and a pair of zeros at the origin and the real axis. If users want to make a phase shift of sign wave, users can change the position of zero at the real axis. The results of the experiment have shown that the new design of sign wave generator has generated sine wave with the correct phase shift according to the theory.

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ANALYZING DYNAMIC FAULT TREES DERIVED FROM MODEL-BASED SYSTEM ARCHITECTURES

  • Dehlinger, Josh;Dugan, Joanne Bechta
    • Nuclear Engineering and Technology
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    • v.40 no.5
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    • pp.365-374
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    • 2008
  • Dependability-critical systems, such as digital instrumentation and control systems in nuclear power plants, necessitate engineering techniques and tools to provide assurances of their safety and reliability. Determining system reliability at the architectural design phase is important since it may guide design decisions and provide crucial information for trade-off analysis and estimating system cost. Despite this, reliability and system engineering remain separate disciplines and engineering processes by which the dependability analysis results may not represent the designed system. In this article we provide an overview and application of our approach to build architecture-based, dynamic system models for dependability-critical systems and then automatically generate dynamic fault trees (DFT) for comprehensive, tool-supported reliability analysis. Specifically, we use the Architectural Analysis and Design Language (AADL) to model the structural, behavioral and failure aspects of the system in a composite architecture model. From the AADL model, we seek to derive the DFT(s) and use Galileo's automated reliability analyses to estimate system reliability. This approach alleviates the dependability engineering - systems engineering knowledge expertise gap, integrates the dependability and system engineering design and development processes and enables a more formal, automated and consistent DFT construction. We illustrate this work using an example based on a dynamic digital feed-water control system for a nuclear reactor.

A Microprocessor Based Design of Walsh Function Generator (마이크로프로세서에 의한 WALSH 함수 발생기 구현)

  • Ahn, D.S.;Park, J.H.;Lee, M.K.;Kim, J.B.
    • Proceedings of the KIEE Conference
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    • 1993.07a
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    • pp.303-305
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    • 1993
  • Walsh function and transform are important analytical tools for control theory and signal processing and have wide applications in those fields, especially in the field of digital communications. Therefore there is a need for a Walsh function generator in order to realize certain applications. And a number of different desists are known. But desist and implementation of such a generator through hardware logic nay give rise to orthogonality error. To develop Walsh function generator which gets rid of orthogonality error, this paper presents a microprocessor based design and implementation method.

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Implementation of Automated Transfer Crane System using CAN Network (CAN 네트워크를 이용한 자동화 크레인 시스템의 구현)

  • Kim Man-Ho;Ha Kyoung-Nam;Lee Kyung-Chang;Hong Keum-Shik;Lee Suk
    • Journal of Navigation and Port Research
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    • v.29 no.6 s.102
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    • pp.555-560
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    • 2005
  • Recently, many control systems are replaced with digital control systems in an effort to optimize the overall performance. In order to operate these systems efficiently, the conventional point-to-point connection method must be changed to the signal exchange via a communication network. This paper investigates the technical feasibility of the crane system using CAN protocol which is a part NMEA 2000 by implementing a network-based control system emulating the crane control system.

DESIGN CONCEPT FOR SINGLE CHIP MOSAIC CCD CONTROLLER

  • HAN WONYONG;JIN Ho;WALKER DAVID D.;CLAYTON MARTIN
    • Journal of The Korean Astronomical Society
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    • v.29 no.spc1
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    • pp.389-390
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    • 1996
  • The CCDs are widely used in astronomical observations either in direct imaging use or spectroscopic mode. However, the areas of available sensors are too small for large imaging format. One possibility to obtain large detection area is to assemble mosaics of CCD, and drive them simultaneously. Parallel driving of many CCDs together rules out the possibility of individual tuning; however, such optimisation is very important, when the ultimate low light level performance is required, particularly for new, or mixed devices. In this work, a new concept is explored for an entirely novel approach, where the drive waveforms are multiplexed and interleaved. This simultaneously reduces the number of leadout connections and permits individual optimisation efficiently. The digital controller can be designed within a single EPLD (Erasable Programmable Logic Device) chip produced by a CAD software package, where most of the digital controller circuits are integrated. This method can minimise the component. count., and improve the system efficiency greatly, based on earlier works by Han et a1. (1996, 1994). The system software has an open architecture to permit convenient modification by the user, to fit their specific purposes. Some variable system control parameters can be selected by a user with a wider range of choice. The digital controller design concept allows great flexibility of system parameters by the software, specifically for the compatibility to deal with any number of mixed CCDs, and in any format, within the practical limit.

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A practical challenge-response authentication mechanism for a Programmable Logic Controller control system with one-time password in nuclear power plants

  • Son, JunYoung;Noh, Sangkyun;Choi, JongGyun;Yoon, Hyunsoo
    • Nuclear Engineering and Technology
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    • v.51 no.7
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    • pp.1791-1798
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    • 2019
  • Instrumentation and Control (I&C) systems of nuclear power plants (NPPs) have been continuously digitalized. These systems have a critical role in the operation of nuclear facilities by functioning as the brain of NPPs. In recent years, as cyber security threats to NPP systems have increased, regulatory and policy-related organizations around the world, including the International Atomic Energy Agency (IAEA), Nuclear Regulatory Commission (NRC) and Korea Institute of Nuclear Nonproliferation and Control (KINAC), have emphasized the importance of nuclear cyber security by publishing cyber security guidelines and recommending cyber security requirements for NPP facilities. As described in NRC Regulatory Guide (Reg) 5.71 and KINAC RS015, challenge response authentication should be applied to the critical digital I&C system of NPPs to satisfy the cyber security requirements. There have been no cases in which the most robust response authentication technology like challenge response has been developed and applied to nuclear I&C systems. This paper presents a challenge response authentication mechanism for a Programmable Logic Controller (PLC) system used as a control system in the safety system of the Advanced Power Reactor (APR) 1400 NPP.

A Study on Multiple Filter for Mixed Noise Removal (복합잡음 제거를 위한 다중 필터에 관한 연구)

  • Kwon, Se-Ik;Kim, Nam-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.11
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    • pp.2029-2036
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    • 2017
  • Currently, the demand for multimedia services is increasing with the rapid development of the digital age. Image data is corrupted by various noises and typical noise is mainly AWGN, salt and pepper noise and the complex noise that these two noises are mixed. Therefore, in this paper, the noise is processed by classifying AWGN and salt and pepper noise through noise judgment. In the case of AWGN, the outputs of spatial weighted filter and pixel change weighted filter are composed and processed, and the composite weights are applied differently according to the standard deviation of the local mask. In the case of salt and pepper noise, cubic spline interpolation and local histogram weighted filters are composed and processed. This study suggested the multiple image restoration filter algorithm which is processed by applying different composite weights according to the salt and pepper noise density of the local mask.

Salt and Pepper Noise Removal using 2-Dimensional Spline Interpolation (2차원 스플라인 보간법을 이용한 Salt and Pepper 잡음 제거)

  • Kwon, Se-Ik;Kim, Nam-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.6
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    • pp.1167-1173
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    • 2017
  • As the society increasingly embraces the high - tech digital information age, the field of image processing becomes progressively more branched out and becoming an imperative field. However, image data is deteriorated due to various causes during transmission and salt and pepper noise is typical. Typical methods for removing salt and pepper noise include CWMF, SWMF, and A-TMF. However, existing methods are somewhat insufficient in their ability to remove noise in salt and pepper noise environments. Therefore, in this paper, after it is determined whether noise removal is needed, the following measures were taken. If the center pixel was non-noise, the original pixel was preserved, If it was noise, we proposed a two - dimensional spline interpolation method and a median filter depending on the noise density of the local mask. For the purpose of objective judgment, we compared the results with that of existing methods and used PSNR (peak signal to noise ratio) as a judgment criterion.

Salt and Pepper Noise Removal using Cubic Spline Interpolation (3차 스플라인 보간법을 이용한 Salt and Pepper 잡음 제거)

  • Kwon, Se-Ik;Kim, Nam-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.10
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    • pp.1955-1960
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    • 2016
  • Currently, with the rapid development in digital era, the image equipment related to multi-media is becoming commercialized. However, in the process of transmitting image data, deterioration occurs due to various causes, and the most representative deterioration is salt and pepper noise. There are many methods of eliminating salt and pepper noise such as SWMF, RSIF, MNRF, which are rather insufficient in eliminating noise in high-density slat and pepper noise environment. Therefore, in order to eliminate salt and pepper noise, this thesis proposes an algorithm by first judging the noise, and when the center pixel value is non-noise, the original pixel is preserved, and when it is noise, the partial mask is subdivided into 4 directions to apply cubic spline interpolation to the direction with most non-noise pixels. Also, for the objective judgement, it was compared to existing methods, and the PSNR(peak signal to nise ratio) was set as the judgement standard.