• Title/Summary/Keyword: Difference Circuits

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A Study on the Threshing Mechanism of Rasp-Bar Type Thresher -Dynamic Analysis of Threshing Process- (줄봉형 탈곡기의 탈곡장치에 관한 연구 -탈곡과정의 역학적 분석-)

  • Park, K.J.;Clark, S.J.;Dwyer, S.V.
    • Journal of Biosystems Engineering
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    • v.18 no.4
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    • pp.371-381
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    • 1993
  • Threshing operation is performed by impact, compression and friction forces inside the thresher. These values should be appropriate to the crop condition to enhance the threshing and separating efficiency and to decrease the grain damage. To analyze the threshing process inside the rasp-bar type thresher, impact, friction and compression forces were measured using transducers with strain gage circuits. To measure the impact forces and friction forces between the rasp-bar and crop, full bridge strain gage circuit was built on the rasp-bar holder. To measure the compression forces and circumferential friction forces between the concave and crop, two sets of full bridge strain gage circuits were built on the T-type concave transducer. Threshing work of wheat crop with 12% of moisture content was performed at 3 levels of compression ratio and with 3 replications. Each transducer could not measure the exact forces continuously because the transducer oscillates with the forces. However they could measure maximum forces and force distribution according to the time. Average friction coefficients between crop and concave was 0.61 not showing any significant difference according to the compression ratio. Average acceleration of the crop in the cylinder appeared from $70.6m/s^2$ to $140.8m/s^2$ according to the compression ratio. The velocity of the crop at the exit of the cylinder appeared from 10.7m/s to 15.0m/s according to the compression ratio.

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Characterization of Microwave Active Circuits using the FDTD Method (FDTD를 이용한 마이크로파 능동 회로의 해석)

  • 황윤재;육종관;박한규
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.13 no.6
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    • pp.528-537
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    • 2002
  • In this paper, the extended FDTD is used for the analysis of microwave circuits including active elements. Lumped elements such as R, L, C which are inserted into a microstrip line are analyzed with the FDTD lumped element modeling. Parasitic capacitance and inductance could be obtained using network modeling and so it is sure that FDTD lumped element modeling makes it possible to get more accurate data which include parasite components. Moreover, a balanced mixer using two diodes that are modeled by an extended FDTD is designed and the more exact characteristic of the mixer is acquired than in current circuit simulator.

Ventilator-associated Pneumonia with Circuit Changes Every 7 Days versus Every 14 Days (회로 교환주기에 따른 인공호흡기 관련 폐렴발생률 차이)

  • Choi, Jeong-Sil;Yeon, Jeong-Haw
    • Journal of Korean Academy of Nursing
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    • v.40 no.6
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    • pp.799-807
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    • 2010
  • Purpose: To determine whether the practice of not routinely changing ventilator circuits in patients who require prolonged mechanical ventilation is associated with ventilator-associated pneumonia (VAP). Methods: Patients were divided into two groups, ventilator circuits were routinely changed every 7 days for the control group (39) and every 14 days for the experimental group (40) over a period of 1 yr (April 1, 2009-March 31, 2010). Pediatric patients (age 17 yr or less) were not included. VAP was diagnosed by the criteria of the Centers of Disease Control and Prevention (CDC). Incidence of VAP and characteristics of infection were evaluated. Results: In the experimental group, 2 episodes of pneumonia were observed in 40 patients and 1,322 ventilator days. The rate of VAP was 1.5 per 1,000 ventilator days. There was 1 episode of pneumonia in 39 patients and 481 ventilator days for the control group. The rate of VAP was 2.1 per 1,000 ventilator days. The difference between both groups was not significant (p=.695). Conclusion: Extending ventilator circuit change interval from 7 days to 14 days does not increase the risk for VAP.

Numerical Investigation of Tunable Band-pass\band-stop Plasmonic Filters with Hollow-core Circular Ring Resonator

  • Setayesh, Amir;Mirnaziry, Sayyed Reza;Abrishamian, Mohammad Sadegh
    • Journal of the Optical Society of Korea
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    • v.15 no.1
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    • pp.82-89
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    • 2011
  • In this paper, we numerically study both band-pass and band-stop plasmonic filters based on Metal-Insulator-Metal (MIM) waveguides and circular ring resonators. The band-pass filter consists of two MIM waveguides coupled to each other by a circular ring resonator. The band-stop filter is made up of an MIM waveguide coupled laterally to a circular ring resonator. The propagating modes of Surface Plasmon Polaritons (SPPs) are studied in these structures. By substituting a portion of the ring core with air, while the outer dimensions of the ring resonator are kept constant, we illustrate the possibility of red-shift in resonant wavelengths in order to tune the resonance modes of the proposed filters. This feature is useful for integrated circuits in which we have limitations on the outer dimensions of the filter structure and it is not possible to enlarge the dimension of the ring resonator to reach to longer resonant wavelengths. The results are obtained by a 2D finite-difference time-domain (FDTD) method. The introduced structures have potential applications in plasmonic integrated circuits and can be simply fabricated.

The Steady State Characteristics of the Push-Pull Current-fed DC-to-DC Converter with Multiple Outputs (다출력 전류환류형 DC-CD 컨버터의 정상특성)

  • 김희준
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.5
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    • pp.536-541
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    • 1988
  • The push-pull current-fed DC-to-DC converter has only one energy storage reactor in series with the input for any number of outputs. It is considered that this property of the converter has considerable advantages over other multiple-output circuits. The steady state characteristics of the converter with two outputs is analyzed. It is known that the voltage difference between the two outputs appears by existing the 2nd winding resistance of transformer and there is a region of the duty ratio in which the voltage difference of the converter is smaller than that of the forward converter.

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Design of Differential Voltage-to-Frequency Converter Using Current Conveyor Circuit (전류 컨베어 회로를 이용한 차동전압-주파수 변환기의 설계)

  • Choi, Jin-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.4
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    • pp.891-896
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    • 2011
  • This paper describes the differential voltage-to-frequency converter which is realized current conveyor circuits. The output frequency of the differential voltage-to-frequency converter is proportional to the difference of two input voltages. The designed circuit is simulated by HSPICE. The range of input voltage difference is from several volts to several milli-volts. From the simulation results the error is less than from -1.9% to +1.8% compared to the calculated values.

Realization of High Speed All-Optical Half Adder and Half Subtractor Using SOA Based Logic Gates

  • Singh, Simranjit;Kaler, Rajinder Singh;Kaur, Rupinder
    • Journal of the Optical Society of Korea
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    • v.18 no.6
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    • pp.639-645
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    • 2014
  • In this paper, the scheme of a single module for simultaneous operation of all-optical computing circuits, namely half adder and half subtractor, are realized using semiconductor optical amplifier (SOA) based logic gates. Optical XOR gate by employing a SOA based Mach-Zehnder interferometer (MZI) configuration is used to get the sum and difference outputs. A carry signal is generated using a SOA-four wave mixing (FWM) based AND gate, whereas, the borrow is generated by employing the SOA-cross gain modulation (XGM) effect. The obtained results confirm the feasibility of our configuration by proving the good level of quality factor i.e. ~5.5, 9.95 and 12.51 for sum/difference, carry and borrow, respectively at 0 dBm of input power.

Power Estimation by Using Testability (테스트 용이도를 이용한 전력소모 예측)

  • Lee, Jae-Hun;Min, Hyeong-Bok
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.3
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    • pp.766-772
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    • 1999
  • With the increase of portable system and high-density IC, power consumption of VLSI circuits is very important factor in design process. Power estimation is required in order to estimate the power consumption. A simple and correct solution of power estimation is to use circuit simulation. But it is very time consuming and inefficient way. Probabilistic method has been proposed to overcome this problem. Transition density using probability was an efficient method to estimate power consumption using BDD and Boolean difference. But it is difficult to build the BDD and compute complex Boolean difference. In this paper, we proposed Propowest. Propowest is building a digraph of circuit, and easy and fast in computing transition density by using modified COP algorithm. Propowest provides an efficient way for power estimation.

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Analysis and design of a FSK Demodulator with Digital Phase Locked Loop (디지털 위상고정루프를 이용한 ESK복조기의 설계 및 성능 분석)

  • 김성철;송인근
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.2
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    • pp.194-200
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    • 2003
  • In this paper, FSK(Frequency Shift Keying) demodulator which is widely used for FH-SS system is designed and the experimental results are analyzed. The performance of the ADPLL(All-digital Phase-Locked-Loop), which is the main part of the demodulator circuit, is analyzed by the computer program. Using Maxplus-II tool provided by altera. co., ltd, each part of the ADPLL is designed and all of them is integrated into EPM7064SLC44-10 chip. And the simulation results are compared with the characteristics of the implemented circuits for analysis. There is about 2${\mu}\textrm{s}$ difference in time constant of the PLL. This difference is not critical in the demodulator. And the experimental results show that the transmitted data is well demodulated when the phase difference between the FSK modulated signal and the reference signal is about 180 degree.

Comparison of Characteristics on the Flux-Lock and the Transformer Type SFCLs with Three Superconducting Units (3개의 초전도 소자를 갖는 자속구속형 SFCL과 변압기형 SFCL의 특성 비교)

  • Lee, Ju-Hyoung;Choi, Hyo-Sang
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.58 no.1
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    • pp.79-84
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    • 2009
  • In order to increase the capacity of the superconducting fault current limiter(SFCL), the current and voltage grades of the SFCL must be increased. As a method for the increase of the current and voltage grades of the SFCL, we compared the various characteristics between the flux-lock type SFCL "With three superconducting units connected in series and the transformer type SFCL using the transformer with three secondary circuits. One of three superconducting units had not quenched in the flux-lock type SFCL. Therefore, the unbalanced power burden happened because of the voltage difference generated by unbalanced quenching between the superconducting units. In the meantime, the three superconducting units were all quenched in the transformer type SFCL using the transformer, and the voltage difference generated between the superconducting units was decreased. Therefore, the difference of critical characteristics was complemented by distribution of fault current in accordance with the turn's ratio between primary and secondary windings. The unbalanced power burden of the superconducting units was reduced due to flux-share between the superconducting units in the transformer. In conclusion, the capacity increment of the SFCL using a transformer was easier due to equal distribution of voltages generated by simultaneous quench of the superconducting units. We think that the characteristics is improved more because of the decrease of saturation in the iron core if the secondary winding is increased in the SFCL using the transformer.