• Korean Journal of Optics and Photonics
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• v.26 no.3
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• pp.139-146
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• 2015

The effects of a dielectric multilayer mirror on the efficiency of organic light-emitting diodes (OLEDs) were investigated by using optical simulation. Adoption of a dielectric mirror consisting of alternating SiN and $SiO_2$ layers narrowed the emission spectrum due to the microcavity effect, and increased the outcoupling efficiency by a few percent. The layer thicknesses of the dielectric mirror were adjusted to change the wavelength of the resonance mode, which may be used to increase the color purity.

• Journal of the Optical Society of Korea
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• v.13 no.2
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• pp.223-226
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• 2009

A Magneto-Optical Trap (MOT) for $^{87}Rb$ atoms near the surface of a dielectric coated mirror at the top of a small $20{\times}25{\times}40\;mm^3$ cell has been observed. Two beams of $3.3\;mW/cm^2$ were used for optical cooling and an anti-Helmholtz magnetic field with a spatial gradient of 9.1 G/cm was used for magnetic trapping. The thickness of the mirror coated on a cover glass was less than $100{\mu}m$. The mirror covered the top of a cell and the atom-chip was located outside the vacuum in order to exploit the long life time of the mirror and easy operation of the chip. The trapping position was found 5 mm beneath the mirror surface. The number of trapped atoms was roughly $3{\times}10^7$ atoms and the temperature was approximately a few tens mK. In this paper, we describe the construction of the mirror-MOT in detail.

• Proceedings of the Optical Society of Korea Conference
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• 1996.09a
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• pp.64-64
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• 1996

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1995.11a
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• pp.183-186
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• 1995

The fabrication of dielectric multilayer mirror(DMM) optimized at the wavelength of 1.55$\mu\textrm{m}$ and its spectral properties were investigated. The materials used in the fabrication of DMM are TiO$_2$-SiO$_2$, which have the advantage of yielding high reflectance for relatively small numbers of layers. The optical constants of TiO$_2$single film were obtained by using a modified envelope method. The reflectances of DMMs with 3,7,11 and 23 layers were 58%, 89%, 97% and 99.9% at the wavelength of 1.55$\mu\textrm{m}$, respectively.

• Proceedings of the Optical Society of Korea Conference
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• 2007.07a
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• pp.187-188
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• 2007

Four kinds of mirror substrates with same surface roughness were fabricated. On those substrates, a dielectric multi-layer coating with high reflectivity was deposited by ion beam sputtering technique. Most of the fused silica mirrors showed lower scattering than the ZERODUR mirrors one, which deposited on substrates similar in surface roughness. The ZERODUR mirrors scattering strongly depend on the micro-structure of $Ta_2O_5/SiO_2$ thin films wear deposited on ZERODUR substrates.

• Journal of the Korean Society for Precision Engineering
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• v.20 no.5
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• pp.218-224
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• 2003

This paper describes a novel MEMS integration technique on a CMOS chip. MEMS integration on CMOS circuit has many advantages in view of manufacturing cost and reliability. The surface topography of a CMOS chip from a commercial foundry has 0.9 ${\mu}{\textrm}{m}$ bumps due to the conformal coating on aluminum interconnect patterns, which are used for addressing each MEMS element individually. Therefore, it is necessary to achieve a flat mirror-like CMOS chip fer the microelectromechanical system (MEMS) such as micro mirror array. Such CMOS chip needs an additional thickness of the dielectric passivation layer to ease the subsequent planarization process. To overcome a temperature limit from the aluminum thermal degradation, this study uses RF sputtering of silicon nitride at low temperature and then polishes the CMOS chip together with the surrounding dummy pieces to define a polishing plane. Planarization reduces 0.9 ${\mu}{\textrm}{m}$ of the bumps to less than 25 nm.

• Current Optics and Photonics
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• v.4 no.1
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• pp.50-56
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• 2020

The design of a concentration system for a solar side-pumped slab laser was investigated. The side size of the slab laser medium is 2 mm × 20 mm. Based on the principle of the edge ray, a secondary concentrating system consisting of a rectangular parabolic mirror (RPM) and a rectangular dielectric-filled compound parabolic concentrator (RDCPC) was demonstrated. The focal length of RPM is 1200 mm and the size is 734 mm × 2000 mm. The outlet size of the RDCPC is 2 mm × 20 mm. The concentration effect was analyzed by using Tracepro optical software. The results showed that the concentration efficiency reached 81.3% and the uniformity of the spot was 91.4% after optimization. This design of concentration system is of great reference value for a solar side-pumped slab laser.

• Korean Journal of Optics and Photonics
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• v.31 no.4
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• pp.169-175
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• 2020

We design a polarization-independent dielectric multilayer thin-film diffraction grating for a spectral-beam-combining (SBC) system with a simple grating structure and low aspect ratio. To maintain the high quality of the SBC beam, we propose a multilayer mirror structure in which the wavefront distortion due to stress accumulation is minimized. Moreover, to prevent light absorption from contamination, an optimized design to minimize the grating thickness was performed. The optimally designed diffraction grating has 99.36% diffraction efficiency for -1st-order polarization-independent light, for incidence at the Littrow angle and 1055-nm wavelength. It is confirmed that the designed diffraction grating has sufficient process margin to secure a polarization-independent diffraction efficiency of 96% or greater.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.3
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• pp.139-144
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• 2003

We report the results of extensive mixed mode simulations and theoretical analysis to quantify the contribution of the edge direct tunneling (EDT) current on the total gate leakage current of 80nm NMOSFET with SiO2 gate dielectric. It is shown that EDT has a profound impact on basic analog circuit building blocks such as sample-hold (S/H) circuit and the current mirror circuit. A transistor design methodology with zero gate-source/drain overlap is proposed to mitigate the EDT effect. This results in lower voltage droop in S/H application and better current matching in current mirror application. It is demonstrated that decreasing the overlap length also improves the basic analog circuit performance metrics of the transistor. The transistor with zero gate-source/drain overlap, results in better transconductance, input resistance, output resistance, intrinsic gain and unity gain transition frequency.

• Korean Journal of Optics and Photonics
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• v.8 no.4
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• pp.283-290
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• 1997

Scattering measurement on high reflection dielectric multilayer mirrors deposited on quartz substrate in a vacuum chamber were performed using a total integrated scattering method. Scattering of (Ta$_2$$O_5$/SiO$_2$) multilayer mirrors deposited at 250-30$0^{\circ}C$ was 0.048-0.050% and did not change with an annealing at 30$0^{\circ}C$ for 4 hours. On the other hand, scattering of (TiO$_2$/SiO$_2$) multilayer mirror at 25$0^{\circ}C$ was 0.029% and it showed the heavy tensile stress after an annealing. The rms roughness of (Ta$_2$$O_5$/SiO$_2$) multilayer mirror was almost the same as that of (TiO$_2$/SiO$_2$)multilayer mirror. The column size of Ta$_2$$O_5$ film was smaller than that of TiO$_2$film and the packing density of (Ta$_2$$O_5$/SiO$_2$) multilayer mirrors was higher than that of (TiO$_2$/SiO$_2$) multilayer mirror. It seems that the higher packing density and smaller column size of Ta$_2$$O_5$ films lead to more scattering.