• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.353-356
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• 1999

A 3.3V PLL(Phase Locked loop) is designed for a high frequency, low voltage, and low power applications. This paper proposes a new PLL architecture to improve voltage to frequency linearity of VCO(Voltage controlled oscillator) with new delay cell. The proposed VCO operates at a wide frequency range of 30MHz~1㎓ with a good linearity. The DC-DC voltage up/down converter is utilized to regulate the control voltage of the two-stage VCO. The designed PLL architecture is implemented on a 0.6${\mu}{\textrm}{m}$ n-well CMOS process. The simulation results show a locking time of 2.6$\mu$sec at 1Hz, Lock in range of 100MHz~1㎓, and a power dissipation of 112㎽.

• 제어로봇시스템학회:학술대회논문집
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• 1987.10b
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• pp.582-587
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• 1987

In this paper, a controller design method for the DC motor driving system is described emphasizing the specified degree of accuracy undergoing large time varying disturbances, coulomb friction and arm-load resonance. A feedforward compensation technique using the current controller is proposed, and resulting in the performance improvement as well as the implementational simplicity. A time-weighted quadratic performance index is used in the optimization of the controller, which is a salient way of obtaining better closed-loop performance in a simple manner. Computer simulations are also given to show the usefulness of the proposed techniques.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.567-570
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• 2002

The LVDS (Low Voltage Differential Signaling) I/O cells, fully compatible with ANSI TIA/ EIA-644 LVDS standard, are designed using a 0.35${\mu}m$ standard CMOS technology. With a single 3V supply, the core cells operate at 1.34Gbps and power consumption of the output driver and the input receiver is 10. 5mW and 4.2mW, respectively. In the output driver, we employ the DCMFB (Dynamic Common-Mode FeedBack) circuit which can control the DC offset voltage of differential output signals. The SPICE simulation result of the proposed output driver shows that the variation of the DC offset voltage is 15.6% within a permissible range. In the input receiver, the proposed dual input stage with a positive feedback latch covers rail-to-rail input common-mode range and enables a high-speed, low-power operation. 5-channels of the proposed LVDS I/O pair can handle display data up to 8-bit gray scale and UXGA resolution.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2002.11a
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• pp.9-14
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• 2002

Direct-conversion receiver(DCR) architecture has superior advantages in size, cost, and power over superheterodyne receiver architectures. However, the use of direct-conversion receiver architecture has been limited due to the direct-current offset noise. The ac coupling, which is used to overcome the direct-current offset noise, causes an inter-symbol interference(ISI), whose effects can be effectively mitigated using an equalizer. In this paper, the performance of a direct-conversion receiver with ac coupling in the presence of direct-current offset is analyzed via computer simulation. The simulation result shows that by using decision feedback equalizer with LMS(Least Mean Square) algorithm, signal-to-noise ratio loss of the direct-conversion receiver compared to the idea receiver can be reduced to less than 1㏈ for corner frequencies as large as 10% of the symbol rate.

• Proceedings of the KIEE Conference
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• 2002.07d
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• pp.2138-2139
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• 2002

In this paper we presents a speed controller for separately excited DC motor using adaptive backstepping technique. The motor was modeled in two local areas the first model is a linear one when speed is under base speed, the other is nonlinear one when field weakening is used to obtain the speed well above base speed. Then linear robust state feedback controller was designed for the linear model while adaptive backstepping controller was designed for the nonlinear model. The adaptive backstepping technique takes system nonlinearity into account in the control system design stage. The proposed controller is proved to be asymptotically stable by the Lyapunov stability theory and some simulations have been carried out to test.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.246-248
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• 1994

This paper describes a bidirectional Voltage Source PWM Converter for an elevator. From the study of boost rectifier, the control circuit desisted by full digital DSP technique. The characteristic of control circuit is that implements of space-vector PWM method and has feedback loop of DC side load current which reduce DC voltage flucturation.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.891-892
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• 2006

Photoplethsymogram (PPG) drifts due to the changes in respiration and blood perfusion as well as external light. This hinders a proper PPG measurement. We controlled DC drifts by controlling the signal ground of PPG signals. A microprocessor-based system successfully controlled DC drifts of PPG signals.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.59 no.3
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• pp.305-310
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• 2010

DC electricity feeder system operating in the urban railway is typically a feedback circuit consisted of the contact wire and electric railway vehicle via rail. But stray current is flowed on a structure that is not part of the intended electrical circuit with respect to a given structure. This paper presents comparison analysis of field test cases based on criteria of electrolytic corrosion protection of buried metallic structures adjacent to DC traction systems. As a result of it, we confirmed that measurement methods are different from each other about the same tests. Therefore measurement methods to prevent electrolytic corrosion need to establish electrical facilities standards to be applied domestic.

• Journal of Power Electronics
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• v.14 no.4
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• pp.778-787
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• 2014

This study presents an input filter resonance mitigation method for an AC-DC matrix converter. This method combines the advantages of the one-cycle control strategy and the active damping technique. Unnecessary sensors are removed, and system cost is reduced by employing the grid-side input currents as feedback to damp out LC resonance. A model that includes the proposed method and the input filter is established with consideration of the delay caused by the actual controller. A zero-pole map is employed to analyze model stability and to investigate virtual resistor parameter design principles. Based on a double closed-loop control scheme, the one-cycle control strategy does not require any complex modulation index control. Thus, this strategy can be more easily implemented than traditional space vector-based methods. Experimental results demonstrate the veracity of theoretical analysis and the feasibility of the proposed approach.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.2983-2985
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• 1999

This paper presents the attitude control of the double inverted pendulum with compliant joint. The biped robot with compliant ankle joint instead of a motor have a good contact between it's sole and ground in the uneven ground. The compliant ankle joint proposed here is composed of springs and mechanical constraint. The lower link is hinged on the plate to free for rotation in the vertical plate. The upper link is connected to the lower link through a DC motor. The DC motor is used to control the posture of the pendulum by adjusting the position of the upper link. The algorithm for controlling a proposed inverted pendulum is nonlinear feedback controller. Simulation with mathematical model are conducted to show the validity of the proposed controller.