• Journal of Advanced Navigation Technology
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• v.28 no.3
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• pp.348-355
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• 2024

A current source capable of stably supplying current as a measurement medium is required in order to measure and test important facilities that require large-scale measurement current, such as a control element drive mechanism control system(CEDMCS), in case of dismantling a nuclear power plant. However, it can provides only voltage power as a source, not current, although direct voltage controlled constant current source is essential to test major equipment. That kind of source is not available to supply stable constant current regardless of load variation. It is just voltage supplier. Developing current source is not easy other than voltage source. Very large-scale current source up to ampere class more than such ten times of normal current is inevitable to test above mentioned equipment. So, we developed large-scale current source which is controlled by input DC voltage and supplies constant stable current to object equipment according to this requirement. We measured and tested nuclear power plant equipment using given real site data for a long time and afforded long period load test, and then proved its validity and verification. The developed invetion will be used future installed important equipment measuring and testing.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.58-68
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• 2006

This work proposes a 10b 250MS/s $1.8mm^2$ 85mW 0.13um CMOS A/D Converter (ADC) for high-performance integrated systems such as next-generation DTV and WLAN simultaneously requiring low voltage, low power, and small area at high speed. The proposed 3-stage pipeline ADC minimizes chip area and power dissipation at the target resolution and sampling rate. The input SHA maintains 10b resolution with either gate-bootstrapped sampling switches or nominal CMOS sampling switches. The SHA and two MDACs based on a conventional 2-stage amplifier employ optimized trans-conductance ratios of two amplifier stages to achieve the required DC gain, bandwidth, and phase margin. The proposed signal insensitive 3-D fully symmetric capacitor layout reduces the device mismatch of two MDACs. The low-noise on-chip current and voltage references can choose optional off-chip voltage references. The prototype ADC is implemented in a 0.13um 1P8M CMOS process. The measured DNL and INL are within 0.24LSB and 0.35LSB while the ADC shows a maximum SNDR of 54dB and 48dB and a maximum SFDR of 67dB and 61dB at 200MS/s and 250MS/s, respectively. The ADC with an active die area of $1.8mm^2$ consumes 85mW at 250MS/s at a 1.2V supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.48-57
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• 2006

This work describes a 12b 200KHz 0.52mA $0.47mm^2$ algorithmic ADC for sensor applications such as motor controls, 3-phase power controls, and CMOS image sensors simultaneously requiring ultra-low power and small size. The proposed ADC is based on the conventional algorithmic architecture with recycling techniques to optimize sampling rate, resolution, chip area, and power consumption. The input SHA with eight input channels for high integration employs a folded-cascode architecture to achieve a required DC gain and a sufficient phase margin. A signal insensitive 3-D fully symmetrical layout with critical signal lines shielded reduces the capacitor and device mismatch of the MDAC. The improved switched bias power-reduction techniques reduce the power consumption of analog amplifiers. Current and voltage references are integrated on the chip with optional off-chip voltage references for low glitch noise. The employed down-sampling clock signal selects the sampling rate of 200KS/s or 10KS/s with a reduced power depending on applications. The prototype ADC in a 0.18um n-well 1P6M CMOS technology demonstrates the measured DNL and INL within 0.76LSB and 2.47LSB. The ADC shows a maximum SNDR and SFDR of 55dB and 70dB at all sampling frequencies up to 200KS/s, respectively. The active die area is $0.47mm^2$ and the chip consumes 0.94mW at 200KS/s and 0.63mW at 10KS/s at a 1.8V supply.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.6
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• pp.670-680
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• 2010

A low power single-chip CMOS receiver for 60 GHz mobile application are proposed in this paper. The single-chip receiver consists of a 4-stage current re-use LNA with under 4 dB NF, Cgs compensating resistive mixer with -9.4 dB conversion gain, Ka-band low phase noise VCO with -113 dBc/Hz phase noise at 1 MHz offset from 26.89 GHz, high-suppression frequency doubler with -0.45 dB conversion gain, and 2-stage current re-use drive amplifier. The size of the fabricated receiver using a standard 0.13 ${\mu}m$ CMOS technology is 2.67 mm$\times$0.75 mm including probing pads. An RF bandwidth is 6.2 GHz, from 55 to 61.2 GHz and an LO tuning range is 7.14 GHz, from 48.45 GHz to 55.59 GHz. The If bandwidth is 5.25 GHz(4.75~10 GHz) The conversion gain and input P1 dB are -9.5 dB and -12.5 dBm, respectively, at RF frequency of 59 GHz. The proposed single-chip receiver describes very good noise performances and linearity with very low DC power consumption of only 21.9 mW.

• Korean Journal of Fisheries and Aquatic Sciences
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• v.28 no.3
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• pp.253-262
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• 1995

To develop a device for measuring fish freshness which could be move accurate and reliable than used freshness measuring systems. A new device based on digital circuit was designed using a microcomputer. The device was composed of a sensor part, 8096 microprocessor and a segment display. The effectiveness of device has been evaluated by the coefficient of correlation among the measured freshness stores such as electrical Q-value, K-value and amount of volatile basic nitrogen (VBN) of plaice, Paralichthys Olivaceus, during storage at $-3^{\circ}C,\;0^{\circ}C,\;5^{\circ}C,\;10^{\circ}C,\;and\;25^{\circ}C$. Q-values measured by a new device were more closely correlated with K-value (r=-0.978-\;-0.962,\;p<0.05) and VBN (r=-0.888-\;-0.988,\;p<0.05) in case of plaice meat. If more data would achieve using various fishes, this new designed device could be a valuable kit in fish market by its compact portability.