• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제54권9호
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• pp.431-436
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• 2005

This paper studies a novel boost DC-DC converter operated high efficiency for discontinuous current mode (DCM) control. The converter worked in DCM eliminates the complicated circuit control requirement, reduces a number of components, and reduces the used reactive components size. In the general DCM converter, the switching devices are turned-on the zero current switching (ZCS), and the switching devices must be switched-off at a maximum reactor current. To achieve the zero voltage switching (ZVS) at the switching turn-off, the proposed converter is constructed by using a new loss-less snubber circuit. Soft-switched operation of the proposed boost converter is verified by digital simulation and experimental results. A new boost converter achieves the soft-switching for all switching devices without increasing their voltage and current stresses. The result is that the switching loss is very low and the efficiency of boost DC-DC converter is high.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2001년도 ICCAS
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• pp.99.2-99
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• 2001

An electronically tunable current-mode second-order multifunctional filter is described in this paper. The proposed filter consists of two four-terminal floating nullors (FTFNs), two dual-output OTAs and two grounded capacitors. The circuit can simultaneously realize the lowpass, bandpass and highpass current transfer functions from the same configuration without changing the circuit configuration and elements. The natural angular frequency we and the parameter wo/Q can be orthogonally controlled through adjusting the transconductance gain of OTA. PSPICE simulation results are employed to confirm the circuit performance.

• Journal of Welding and Joining
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• 제16권4호
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• pp.39-46
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• 1998

$CO_2$ gas shielded arc welding has been characterized with its harsh arc compared to Ar-based shielding gases and with its high level of spattere specially in welding current range of 250~300 amperes. In this range of welding current, the metal transfer mode showed to be changed from short circuit to globular with the increase of welding voltage resulting in so-called the transitional mode in which both modes of transfer appeared together. To characterize the transitional mode, the short circuit events were divided into two groups, i.e. normal short circuit (N.S.C) which has short circuit time $(t_s)$ over 2msec and instantaneous short circuit (I.S.C) of $t_s$$\leq$2msec. The experimental results showed that the number of N.S.C decreased almost linearly with the increase of welding voltage and appeared to be not related with spatter generation rate. However I.S.C became to be pronounced in the transitional condition and its number reached the maximum value at around 29.0 volts. Considering the relation with the spatter generation rate, it was found that the number of I.S.C had a very strong correlation with the spatter generation rate of the transitional condition. It was further demonstrated that spatter generation rate decreased quite linearly with the decrease of I.S.C frequency. It implies that I.S.C is the most important waveform factor controlling the spatter generation of the transitional mode, i.e. in the middle range of welding current. Based on these results, It was discussed that in the transitional mode the basic concept of waveform control for suppressing spatter generation would be different from the one applied for typical short circuit transfer mode of low welding current.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 A
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• pp.275-278
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• 2003

This paper presents a full-adder using current-mode multiple valued logic CMOS circuits. This paper compares propagation delay, power consumption, and PDP(Power Delay Product) compared with conventional circuit. This circuit is designed with a samsung 0.35um n-well 2-poly 3-metal CMOS technology. Designed circuits are simulated and verified by HSPICE. Proposed full-adder has 2.25 ns of propagation delay and 0.21 mW of power consumption.

• 전기전자학회논문지
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• 제14권2호
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• pp.1-8
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• 2010

본 논문에서는 대기전력을 줄일 수 있는 Green Mode Power IC 회로를 설계하였다. 이 회로는 switch mode power supply(SMPS)을 구동하기 위한 PWM 기능을 가지고 있으며, 불필요한 소비전력을 제거하기 위해 burst mode와 skip mode 구간을 만들고 대기전력을 낮출 수 있도록 외부의 Power MOSFET에 의해 제어된다. 제안한 회로는 KEC 30V-High Voltage 0.5um CMOS process를 이용하여 시뮬레이션 하였다. 회로 내부는 크게 voltage regulator 회로, voltage reference 회로, UVLO(Under Voltage Lock Out)회로, Ibias 회로, green 회로, PWM 회로, OSC 회로, protection회로, control 회로, Level shift&Driver 회로로 구성되어 있다. 시뮬레이션 결과로부터 회로 동작 시 각 블록의 소비전류를 측정하여 확인한 결과 블록 별 전류총합이 1.29mA이었고, 이 값은 목표 설계치인 1.3mA을 충족시킴을 입증하였다. 이 값은 기존 IC의 소비전류보다 1/2이상 줄어든 값이며, 대기모드로 동작할 경우는 전력소비를 1W 미만까지 줄일 수 있었다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.186-190
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• 2000

This paper propose a "Active common-mode voltage damper circuit" that capable of a suppression of a common-mode voltage produced in the PWM VSI. The four level half-bridge PWM inverter circuit and common-mode transformer are incorporated into the "Active common-mode voltage damper" the design method of which is presented Effect of "Active common-mode voltage damper" in this paper verifies a propriety and effectiveness in 2.2[kW] induction motor drive using IGBT inverter. Experimental results show that "common-mode voltage damper" makes contributions to reducing a high frequency leakage current and common-mode voltage.leakage current and common-mode voltage.

• 전자공학회논문지B
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• 제31B권4호
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• pp.55-61
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• 1994

The multiple valued logic(MVL) circuit with ROM type using current mode CMOS is presented in this paper. This circuit is composed of the multiple valued-to-binary(MV/B) decoder and the selection circuit. The MV/B decoder decodes the single input multiple valued signal to N binary signal, and the selection circuits is composed N$\times$N array of the selecion cells with ROM types. The selection cell is realized with the current mirror circuits and the inhibit circuits. The presented circuit is suitable for designing the circuit of MVL functions with independent variables, and reduces the number of selection cells for designing the circuit of symmetric MVL functions as many as {($N^2$-N)/2}+N. This circuit possess features of simplicity. expansibility for array and regularity, modularity for the wire routing. Also, it is suitable for VLSI implementation.

• 전기전자학회논문지
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• 제17권1호
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• pp.77-82
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• 2013

본 논문에서는 인덕터의 흐르는 전류를 감지하여 출력 전압을 일정하게 유지시키는 Peak Current-mode 방식의 DC-DC Buck Converter를 제안하고, 소신호 모델링에 기초하여 Power Stage 설계 방법과 시스템의 안정도를 설계하는 방법을 제안한다. 또한, dc-dc 컨버터의 신뢰성과 성능을 향상시키기 위해 보호회로를 추가하였다. 그리고 정전기 방지를 위하여 ESD 보호회로를 제안하였다. 제안된 보호회로는 게이트-기판 바이어싱 기술을 이용하여 낮은 트리거 전압을 구현하였다. 시뮬레이션 결과는 일반적인 ggNMOS의 트리거 전압(8.2V) 에 비해 고안된 소자의 트리거 전압은 4.1V 으로 더 낮은 트리거 전압 특성을 나타냈다. 본 논문에서 제안하는 회로의 시뮬레이션은 0.35um BCB 공정 파라미터를 이용하였고, Mathworks 사의 Mathlab과 Synopsys 사의 HSPICE 프로그램을 사용하여 검증하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.529-530
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• 2006

An efficient sensing scheme adoptable in DC-DC converter is described. The output voltage of the whole DC-DC converter is fed back to the input voltage of the sensor. The comparison in the sensor is accomplished by a current push-pull action. With a fixed reference, the comparator can be embodied based on (W/L) ratios. The current-mode scheme benefits the system better than a conventional voltage-mode one in terms of small area, low power consumption.

• 한국산학기술학회논문지
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• 제11권7호
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• pp.2570-2578
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• 2010

본 논문에서는 임계전류도통모드로 동작하는 디지털제어 단상 역률개선(PFC; power-factor correction) 컨버터를 제안한다. 제안한 컨버터는 PFC를 위하여 DC-DC 부스트 컨버터 구조를 이용하며 인덕터전류를 임계도통모드로 동작시킨다. 또한 제안한 컨버터는 마이컴을 이용하여 디지털적으로 제어되기 때문에 제어회로는 간단해지고 컨버터는 더욱 효과적으로 동작한다. 본 논문에서는 먼저 제안한 컨버터의 동작원리를 설명하고 회로를 해석한다. 그리고 본 논문은 제안한 컨버터의 구현방법을 소프트웨어와 회로설계 부분으로 구분하여 구체적인 설계예와 함께 설명한다. 또한 설계된 회로파라미터에 의한 프로토타입 컨버터의 실험결과로 제안한 컨버터가 단상 PFC 컨버터로써 좋은 동작 특성을 가지고 있음을 보인다.