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http://dx.doi.org/10.7471/ikeee.2013.17.1.077

A Design of Peak Current-mode DC-DC Buck Converter with ESD Protection Devices  

Park, Jun-Soo (Dept. of Electronics and Electrical Engineering, Dankook University)
Song, Bo-Bae (Dept. of Electronics and Electrical Engineering, Dankook University)
Yoo, Dae-Yeol (Dept. of Electronics and Electrical Engineering, Dankook University)
Lee, Joo-Young (Dept. of Electronics Engineering, Seokyeong University)
Koo, Yong-Seo (Dept. of Electronics and Electrical Engineering, Dankook University)
Publication Information
Journal of IKEEE / v.17, no.1, 2013 , pp. 77-82 More about this Journal
Abstract
In this paper, dc-dc buck converter controled by the peak current-mode pulse-width-modulation (PWM) presented. Based on the small-signal model, we propose the novel methods of the power stage and the systematic stability designs. To improve the reliability and performance, over-temperature and over-current protection circuits have been designed in the dc-dc converter systems. To prevent electrostatic An electrostatic discharge (ESD) protection circuit is proposed. The proposed dc-dc converter circuit exhibits low triggering voltage by using the gate-substrate biasing techniques. Throughout the circuit simulation, it confirms that the proposed ESD protection circuit has lower triggering voltage(4.1V) than that of conventional ggNMOS (8.2V). The circuit simulation is performed by Mathlab and HSPICE programs utilizing the 0.35um BCD (Bipolar-CMOS-DMOS) process parameters.
Keywords
Buck Converter; Peak Current-mode; ESD; DC-DC Converter; ggNMOS;
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  • Reference
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