• Title/Summary/Keyword: Communication Chip

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Implementation of IEEE 802.15.4 Channel Analyzer for Evaluating WiFi Interference (WiFi의 간섭을 평가하기 위한 IEEE 802.15.4 채널분석기의 구현)

  • Song, Myong-Lyol;Jin, Hyun-Joon
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.63 no.2
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    • pp.81-88
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    • 2014
  • In this paper, an implementation of concurrent backoff delay process on a single chip with IEEE 802.15.4 hardware and 8051 processor core that can be used for analyzing the interference on IEEE 802.15.4 channels due to WiFi traffics is studied. The backoff delay process of IEEE 802.15.4 CSMA-CA algorithm is explained. The characteristics of random number generator, timer, and CCA register included in the single chip are described with their control procedure in order to implement the process. A concurrent backoff delay process to evaluate multiple IEEE 802.15.4 channels is proposed, and a method to service the associated tasks at sequentially ordered backoff delay events occurring on the channels is explained. For the implementation of the concurrent backoff delay process on a single chip IEEE 802.15.4 hardware, the elements for the single channel backoff delay process and their control procedure are used to be extended to multiple channels with little modification. The medium access delay on each channel, which is available after execution of the concurrent backoff delay process, is displayed on the LCD of an IEEE 802.15.4 channel analyzer. The experimental results show that we can easily identify the interference on IEEE 802.15.4 channels caused by WiFi traffics in comparison with the way displaying measured channel powers.

The VoIP System on Chip Design and the Test Board Development for the Function Verification (VoIP 시스템 칩 설계 및 기능 검증용 보드 개발)

  • 소운섭;황대환;김대영
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.990-994
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    • 2003
  • This paper describes the VoIP(Voice over Internet Protocol) SoC(System on Chip) Design and the test board development for the function verification to support voice communication services using Internet. To implement the simple system of configuration, we designed the VoIP SoC which have ARM922T of 32bit microprocessor, IP network interface, voice signal interface, various user interface function. Also we developed test program and communication protocol to verify the function of this chip. We used several tools of design and simulation, developed and tested a test board with Excalibur which includes ARM922T microprocessor and FPGA.

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Performance Evaluation of Non-Coherent Detection Based Cyclic Code-Shift Keying (비동기 검파 기반 순환 부호 편이 변조 방식의 성능 분석)

  • Baek, Seung-Min;Park, Su-Won;Chung, Young-Uk
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.6
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    • pp.42-48
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    • 2010
  • Joint Tactical Information Distribution System (JTIDS) uses cyclic code shift keying (CCSK) for baseband symbol modulation, in which 5-bit information is mapped to one of thirty two 32-chip sequences. It is a kind of direct sequence based spread spectrum communication. In this paper, the performance of non-coherent detection of CCSK using non-orthogonal 32-chip sequence is evaluated. And a 32-chip sequence with better performance is also proposed and compared with the conventional one.

A Manufacturing Process Model of Internet of Things Devices Using a PCB-mounted RFID Tag Chip (PCB 부착형 RFID 태그 칩을 이용한 사물인터넷 디바이스 생산 공정에 대한 모델)

  • Park, Yungi;Seo, Jeongwook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.05a
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    • pp.674-675
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    • 2016
  • In this paper, we propose a manufacturing process model of Internet of Things devices using a Printed Circuit Board (PCB)-mounted RFID tag chip for reducing electronic wastes. Electrical and electronic products require a PCB surface mount and many examination. Also, conventional barcode systems cannot provide traceability management in PCB manufacturing before finishing Surface Mount Technology (SMT) process. The proposed process model does not require workers' attaching and detaching process unlike barcode systems. Also, RFID tag chip can record all the data in manufacturing steps. Thus, the number of connections to a database management system (DBMS) can be reduced.

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Design and Implementation of ISDN System On a Chip (ISDN 시스템 통합 칩 설계 및 구현)

  • 이제일;황대환;소운섭;김진태
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.12C
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    • pp.273-279
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    • 2001
  • This paper describes a design and implementation of ISDN system on a chip which provides ISDN service and used to develop a low-price multimedia communication terminal. This ISDN SOC is an ISDN system control chip which has 32bit RISC processor, and it includes ISDN S interface transceiver, G.711 voice CODEC, PC interface for data communication, ISDN protocol which includes Q.931 call control protocol and internet protocol. It provides good solution to develope ISDN terminal equipment and ISDN terminal adaptor which connected with basic rate interface, because it minimize external peripheral devices.

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Highly Productive Process Technologies of Cantilever-type Microprobe Arrays for Wafer Level Chip Testing

  • Lim, Jae-Hwan;Ryu, Jee-Youl;Choi, Woo-Chang
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.2
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    • pp.63-66
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    • 2013
  • This paper describes the highly productive process technologies of microprobe arrays, which were used for a probe card to test a Dynamic Random Access Memory (DRAM) chip with fine pitch pads. Cantilever-type microprobe arrays were fabricated using conventional micro-electro-mechanical system (MEMS) process technologies. Bonding material, gold-tin (Au-Sn) paste, was used to bond the Ni-Co alloy microprobes to the ceramic space transformer. The electrical and mechanical characteristics of a probe card with fabricated microprobes were measured by a conventional probe card tester. A probe card assembled with the fabricated microprobes showed good x-y alignment and planarity errors within ${\pm}5{\mu}m$ and ${\pm}10{\mu}m$, respectively. In addition, the average leakage current and contact resistance were approximately 1.04 nA and 0.054 ohm, respectively. The proposed highly productive microprobes can be applied to a MEMS probe card, to test a DRAM chip with fine pitch pads.

Design and Verification of IEEE 802.11a Baseband Processor (IEEE 802.11a 기저대역 프로세서의 설계 및 검증)

  • Kim, Sang-In;Kim, Su-Young;Seo, Jung-Hyun;Yun, Tae-Il;Lee, Je-Hoon;Cho, Kyoung-Rok
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.6 s.360
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    • pp.9-17
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    • 2007
  • This paper shows an implementation of the baseband processor compliant with the IEEE 802.11a standard. Some innovative techniques are proposed to fulfill the mandatory requirements of the standard. For verification and analysis of this design, we use a Platform-based SoC (system on chip) environment. The entire system consists of test-board for the baseband processor chip and the SoC platform for implementing MAC (medium access control).

Development of a Large Quantity of Inputs Interface System Using a Single Chip microcontroller (원칩 마이컴을 이용한 대용량 입력 인터페이스 시스템의 개발)

  • Park, Ju-Tae;Choi, Duck-sung;Jeong, Seung-Hyun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.1
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    • pp.215-221
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    • 2016
  • In this thesis we introduce a large quantity of input interface system using a low cost single chip microcontroller which is consists of walking board with 1600 switches, RS485 communication for switch data communication and PC application software for walking pattern analysis. When a pedestrian walks on the walking board, the pattern analysis of foot pressed switches can be utilized on diverse divisions of sports and industry such as walking physical therapy, dancing, a large quantity of sensors interface system, etc.

Design of A Low Power Memory Tag for Storing Emergency Manuals (긴급 매뉴얼 저장용 저전력 메모리 태그의 설계)

  • Kwak, Noh Sup;Eun, Seongbae;Son, Kyung A;Cha, Shin
    • Journal of Korea Multimedia Society
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    • v.23 no.2
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    • pp.293-300
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    • 2020
  • Since the communication networks like the Internet collapses at disaster and calamity sites, a maintenance system that can be operated offline is required for the maintenance of various facilities. In this paper, we propose a system that memory tags attached on the facilities may transmit the emergency manual to a smart-phone, and the smart phone displays it off-line. The main issue is to design low energy mode memory tags. This study presents two kinds of methods and analyzes each's energy consumption mode. The first one is to develop memory tags by using one chip, and the next one is to design memory tags by forming multi-modules. Both ways show proper application fields under the low energy mode. This research selects the off-line maintenance system by using one chip design, and proposes the direction of contents for enhancing the effectiveness of the system. And we expect that this memory tags will be valuable for disaster scenes as well as battle fields.

Impedance Evaluation Method of UHF RFID Tag Chip for Maximum Read Range (UHF RFID 태그의 최대 인식 거리를 얻기 위한 태그 칩의 임피던스 산출 방법)

  • Sim, Yong-Seog;Yang, Jeen-Mo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.12
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    • pp.1148-1157
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    • 2013
  • In a passive UHF RFID system, the impedance matching between tag antenna and chip as well as the protocol parameter settings in a reader plays important role in determination of the maximum read-range. Almost no paper, however, has dealt with the above issues in relation with the maximum read range. In this paper, two known methods (of using the value from data sheets and proprietary RFID tester) and our proposing method in chip impedance evaluation are compared in terms of maximum read range. The read range of tags whose antenna impedance is conjugate matched with the chip impedance obtained from the proposed method is improved maximum 73 % more than that of tags from the other methods.