• Progress in Superconductivity
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• v.13 no.2
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• pp.105-110
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• 2011

SQUID sensor-based ultra low-field magnetic resonance apparatus with ${\mu}T$-level measurement field requires a strong prepolarization magnetic field ($B_p$) to magnetize its sample and obtain magnetic resonance signal with a high signal-to-noise ratio. This $B_p$ needs to be ramped down very quickly so that it does not interfere with signal acquisition which must take place before the sample magnetization relaxes off. A MOSFET switch-based $B_p$ coil driver has current ramp-down time ($t_{rd}$) that increases with $B_p$ current, which makes it unsuitable for driving high-field $B_p$ coil made of superconducting material. An energy cycling-type current driver has been developed for such a coil. This driver contains a storage capacitor inside a switch in IGBT-diode bridge configuration, which can manipulate how the capacitor is connected between the $B_p$ coil and its current source. The implemented circuit with 1.2 kV-tolerant devices was capable of driving 32 A current into a thick copper-wire solenoid $B_p$ coil with a 182 mm inner diameter, 0.23 H inductance, and 5.4 mT/A magnetic field-to-current ratio. The measured trd was 7.6 ms with a 160 ${\mu}F$ storage capacitor. trd was dependent only on the inductance of the coil and the capacitance of the driver capacitor. This driver is scalable to significantly higher current of superconducting $B_p$ coils without the $t_{rd}$ becoming unacceptably long with higher $B_p$ current.

• Journal of the Microelectronics and Packaging Society
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• v.27 no.3
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• pp.61-67
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• 2020

In this paper, we calculated the warpage of bare substrates and chip attached substrates by using FEM (Finite Element Method), and compared and analyzed the effect of the chips' attachment on warpage. Also, the effects of layer thickness of substrates for reducing warpage were analyzed and the conditions of layer thickness were analyzed by signal-to-noise ratio of Taguchi method. According to the analysis results, the direction of warpage pattern in substrates can change when chips are attached. Also, the warpage decreases as the difference in the CTE (coefficient of thermal expansion) between the top and bottom of the package decreases and the stiffness of the package increases after chips are loaded. In addition, according to the impact analysis of design parameters on substrates where chips are not attached, in order to reduce warpage, the inner layers of the circuit layer Cu1 and Cu4 has be controlled first, and then concentrated on the thickness of the solder resist on the bottom side and the thickness of the prepreg layer between Cu1 and Cu2.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.5
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• pp.154-161
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• 2009

Recently, as many functional blocks are integrated on a small area the high speed integrated circuits emerge as a critical electromagnetic interferer which causes mal-function of adjacent circuitries and lowers the sensitivity of the wireless receivers. Therefore, it is necessary to devise an precise analyzing tool to pinpoint the major electromagnetic noise contributor among the internal circuit blocks of high speed IC's. This paper presents the design, fabrication, and measurement results of the high resolution magnetic field probe which can measure the current density on the IC surface. In order to achieve the high resolution, the magnetic field probe is fabricated using 3-metal semiconductor process so that its thickness is reduced by 10% than that of conventional works. Through the magnetostatic analysis and EM simulation, spatial resolution and sensitivity to the nonmagnetic field components are analyzed. Experimentally, it is found that the fabricated probe can measure the current density on the IC surface with $210{\mu}m$-spatial-resolution.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.2
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• pp.45-49
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• 2009

In this paper, a direct down conversion LNA/Mixer has been designed and tested for 900Mhz UHF RFID application. The designed circuit has been implemented in 0.18um CMOS technology with 3.3V operation. In this work, a common gate input architecture has been used to cope with the higher input self jamming level. This LNA/Mixer is designed to support two operating modes of high gain mode and low gain mode according to the input jamming levels. The measured results show that the input referred P1dBs are 4dBm of high gain mode and 11dBm of low gain mode, and the conversion gains are 12dB and 3dB in high and low gain mode respectively The power consumptions are 60mW for high gain mode and 79mW for low gain mode. The noise figures are 16dB and 20dB in high gain mode and low gain mode respectively.

• Journal of IKEEE
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• v.2 no.1 s.2
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• pp.15-23
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• 1998

In this paper, distributed mixer is studied at microwave frequency. The circuit of distributed mixer composed of gate 1,2, drain transmission lines, matching circuits in input and output terminal, DGFET's. For impedance matching of input and output port at higher frequency, image impedance concept is introduced. In distributed mixer, a DGFET's impedances are absorbed by artificial transmission line, this type of mixer can get a very broadband characteristics compared to that of current systems. A RF/LO signal is applied to each gate input port, and are excited the drain transmission line through transcondutance of the DGFET's. The output signals from each drain port of DGFET's added in same phases. We designed and frabricated the distributed mixer, and a conversion gain, noise figure, bandwidth, LO/RF isolation of the mixer are shown through computer simulation and experimentation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.53-60
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• 2005

Recently, sub-micron CMOS technologies have taken the place of III-V materials in a number of areas in integrated circuit designs, in particular even for the applications of gjgabit optical communication applications due to its low cost, high integration level, low power dissipation, and short turn-around time characteristics. In this paper, a four-channel transimpedance amplifier (TIA) array is realized in a standard 0.35mm CMOS technology Each channel includes an optical PIN photodiode and a TIA incorporating the fully differential regulated cascode (RGC) input configuration to achieve effectively enhanced transconductance(gm) and also exploiting the inductive peaking technique to extend the bandwidth. Post-layout simulations show that each TIA demonstrates the mid-band transimpedance gain of 59.3dBW, the -3dB bandwidth of 2.45GHz for 0.5pF photodiode capacitance, and the average noise current spectral density of 18.4pA/sqrt(Hz). The TIA array dissipates 92mw p in total from a single 3.3V supply The four-channel RGC TIA array is suitable for low-power, high-speed optical interconnect applications.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.3
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• pp.26-34
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• 1999

A new silicon-based IC interconnect transmission line parameter extraction methodology is presented and experimentally examined. Unlike the PCB or MCM interconnects, a dominant energy propagation mode in the silicon-based IC interconnects is not quasi-TEM but slow wave mode(SWM). The transmission line parameters are extracted taking the silicon substrate effect (i.e., slow wave mode) into account. The capacitances are calculated considering silicon substrate surface as a ground. Whereas the inductances are calculated by using an effective dielectric constant. In order to verify the proposed method, test patterns were designed. Experimental data have agreement within 10%. Further, crosstalk noise simulation shows excellent agreements with the measurements which are performed with high-speed time domain measurement ( i.e., TDR/TDT measurements) for test pattern, while RC model or RLC model without silicon substrate effect show about 20~25% underestimation error.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.38 no.4
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• pp.22-32
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• 2001

In this paper, we propose an average acquisition time and hardware design of high speed PN code synchronous acquisition system using DMF(Digital Matched Filter) with new switching method in DS-SS/CDMA(Direct Sequence Spread Spectrum Code Division Multiple Access). In reality, the PN code synchronous acquisition system using DMF has very complicated hardware, high cost and high power consumption. The PN code synchronous acquisition system using proposed switching method DMF can overcome those disadvantages. Therefore, we can make hardware simple and obtain low power and high density by reducing the area by 1/5 against the conventional approaches of using either the matched filters or the serial correlators. The proposed system architecture is also simple and easily controllable since there is no square-term circuit after execution of digital filtering.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.3
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• pp.154-161
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• 2006

This paper describes the new types of ngative differential resistance (NDR) IC applications which use a monolithic quantum-effect device technology based on the RTD/HBT heterostructure design. As a digital IC, a low-power/high-speed MOBILE (MOnostable-BIstable transition Logic Element)-based D-flip flop IC operating in a non-return-to-zero (NRZ) mode is proposed and developed. The fabricated NRZ MOBILE D-flip flop shows high speed operation up to 34 Gb/s which is the highest speed to our knowledge as a MOBILE NRZ D-flip flop, implemented by the RTD/HBT technology. As an analog IC, a 14.75 GHz RTD/HBT differential-mode voltage-controlled oscillator (VCO) with extremely low power consumption and good phase noise characteristics is designed and fabricated. The VCO shows the low dc power consumption of 0.62 mW and good F.O.M of -185 dBc/Hz. Moreover, a high-speed CML-type multi-functional logic, which operates different logic function such as inverter, NAND, NOR, AND and OR in a circuit, is proposed and designed. The operation of the proposed CML-type multi-functional logic gate is simulated up to 30 Gb/s. These results indicate the potential of the RTD based ICs for high speed digital/analog applications.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.2
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• pp.191-199
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• 2008

In this paper, we present a performance analysis and design and implementation results of a 2.4 GHz bio-radar system that can detect human heartbeat and respiration signals. In order to design a 2.4 GHz bio-radar system qualitatively, we investigate the electromagnetic properties of human tissues and calculate the target SNR of demodulation output with respect to distance. The target SNR is defined by the 90 % success ratio for detecting heartbeat signal. With this target SNR value, the performance and link budget of the bio-radar system is simulated using MATLAB. Using this link budget results, the direct conversion receiver is designed and Implemented in 4 layer printed circuit board(PCB). With output power of 0 dBm and 5 Hz bandwidth, 80 % success ratio of 50 cm is measured. Measurement results show a good agreement with simulation results.