• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.261-264
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• 2005

This paper presents the design of a down-conversion mixer with built-in active balun integrated in a $0.25\;{\mu}m$ pHEMT process. The active balun consists of series-connected common-gate FET and common-source FET. The designed balun achieved broadband characteristics by optimizing gate-width and bias condition for the reduction in parasitic effect. From DC to more than 6GHz, the active balun shows the phase error of less than 3 degree and the gain error of less than 0.4 dB. A single-balanced down-conversion mixer with built-in broadband active balun has been designed with optimum width, load resistor and bias for conversion gain and without any matching component for broadband operating. The designed mixer whose size of including on-chip bias circuit is $1\;mm{\times}1\;mm$ shows the conversion gain of better than 7 dB from 2 GHz to 6 GHz and $P_{1dB}$ of -10 dBm at 5.8 GHz

• Journal of electromagnetic engineering and science
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• v.8 no.3
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• pp.129-133
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• 2008

An integrated passive device(IPD) technology by semi-insulating(SI)-GaAs-based fabrication has been developed to meet the ever increasing needs of size and cost reduction in wireless applications. This technology includes reliable NiCr thin film resistor, thick plated Cu/Au metal process to reduce resistive loss, high breakdown voltage metal-insulator-metal(MIM) capacitor due to a thinner dielectric thickness, lowest parasitic effect by multi air-bridged metal layers, air-bridges for inductor underpass and capacitor pick-up, and low chip cost by only 6 process layers. This paper presents the Wilkinson power divider with excellent performance for digital cellular system(DCS). The insertion loss of this power divider is - 0.43 dB and the port isolation greater than - 22 dB over the entire band. Return loss in input and output ports are - 23.4 dB and - 25.4 dB, respectively. The Wilkinson power divider based on SI-GaAs substrates is designed within die size of $1.42\;mm^2$.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.10
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• pp.91-97
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• 1998

The modulation performance of 10 Gbps electro-absorption InGaAsP/InGaAsP strain compensated MQW (Multiple Quantum Well) modulator module depends on the modulator as well as the package parasitics. The high frequency package parasitics resulting from various structural discontinuities, limit the modulation bandwidth and increase the chirp-parameter. Therefore, we propose the double bondwires embedded in dielectric materials to minimize the bondwire parasitics. Using the proposed structure with 50 $\Omega$ terminating resistor, the modulation bandwidth is greatly increased by 125 % than the bare chip and the chirp-parameter is also reduced. This technique can be used in optimizing the package of high speed external modulators.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.61 no.1
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• pp.41-46
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• 2012

Electrolytic power capacitors have been widely used in power conversion system such as inverter or UPS because of characteristics of large capacitance, high-voltage and low-cost. The electrolytic capacitor, which is most of the time affected by the aging effect, plays a very important role for the power-electronics system quality and reliability. Therefore it is important to diagnosis monitoring the condition of an electrolytic capacitor in real-time to predict the failure. In this paper, the on-line remote diagnosis monitoring system for UPS DC link electrolytic capacitors using low-cost single-chip zigbee communication modules is developed. To estimate the health status of the capacitor, the equivalent series resistor(ESR) of the component has to be determined. The capacitor ESR is estimated by using RMS computation using BPF modeling of DC link ripple voltage/current. Zigbee-based hardware experimental results show that the proposed remote capacitor diagnosis monitoring system can be applied to UPS successfully.

• KIEE International Transactions on Electrophysics and Applications
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• v.2C no.6
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• pp.304-308
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• 2002

We demonstrate a simple pulsed $CO_2$ laser with millisecond long pulse duration in a tube at a low pressure of less than 30 Torr. The novel power supply for our laser system switches the voltage of the AC power line (60Hz) directly. The power supply doesn't need elements such as a rectifier bridge, energy-storage capacitors, or a current-limiting resistor in the discharge circuit. To control the laser output power, the pulse repetition rate is adjusted up to 60Hz and the firing angle of SCR(Silicon Controlled Rectifier) gate is varied from 30。 to 150。. A ZCS (Zero Crossing Switch) circuit and a PIC one-chip microprocessor are used to control precisely the gate signal of the SCR. The maximum laser output of 35 W is obtained at a total pressure of 18 Torr, a pulse repetition rate of 60 Hz, and a SCR gate firing angle of 90。 . In addition, the resulting laser pulse width is approximately 3㎳(FWHM). This is a relatively long pulse width, compared with other repetitively pulsed $CO_2$ lasers.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.2
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• pp.184-191
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• 1993

Continuous-time integrated filters, implemented in MOS VLSI technology, have been receiving considerable attention. In this paper, a continuous-time fifth order elliptic low-pass MOSFET-C filter has been designed with a cutoff frequency 3,400Hz. First an active RC filter is designed using cascade method which each block can be tunable. And then the resistors of an active RC network are replaced by a linear resistor using NMOS depletion transistors operated in the triode region. This continuous-time MOSFET filter have simpler structure than switched-capacitor filter, so reduce the chip area. The designed MOSFET-C filter characteristics are simulated by PSPICE program.

• ETRI Journal
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• v.33 no.6
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• pp.897-903
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• 2011

A hybrid ${\Delta}{\Sigma}$ modulator for audio applications is presented in this paper. The pulse generator for digital-to-analog converter alleviates the requirement of the external clock jitter and calibrates the coefficient variation due to a process shift and temperature changes. The input resistor network in the first integrator offers a gain control function in a dB-linear fashion. Also, careful chopper stabilization implementation using return-to-zero scheme in the first continuous-time integrator minimizes both the influence of flicker noise and inflow noise due to chopping. The chip is implemented in a 0.13 ${\mu}m$ CMOS technology (I/O devices) and occupies an active area of 0.37 $mm^2$. The ${\Delta}{\Sigma}$ modulator achieves a dynamic range (A-weighted) of 97.8 dB and a peak signal-to-noise-plus-distortion ratio of 90.0 dB over an audio bandwidth of 20 kHz with a 4.4 mW power consumption from 3.3 V. Also, the gain of the modulator is controlled from -9.5 dB to 8.5 dB, and the performance of the modulator is maintained up to 5 nsRMS external clock jitter.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.8
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• pp.67-74
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• 2004

In this paper, a 3.3V 8-bit 500MSPS based on an interpolation architecture CMOS A/D converter is designed. In order to overcome the problems of high speed operation, a novel pre-amplifier, a circuit for the Reference Fluctuation, and an Averaging Resistor are proposed. The proposed Interpolation A/D Converter consists of Track ＆ Hold, four resistive ladders with 256 taps, 128 comparators, and digital blocks. The proposed A/D Converter is based on 0.35um 2-poly 4-metal N-well CMOS technology. The A/D Converter dissipates 440 mW at a 3.3 Volt single power supply and occupies a chip area of 2250um x 3080um.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.2138-2139
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• 2005

We demonstrate a simple CO2 laser by controlling firing angle of a TRIAC switch in ac power line. The power supply for our laser system switches the voltage of the AC power line (60Hz) directly. The power supply does not need elements such as a rectifier bridge, energy-storage capacitors, or a current-limiting resistor in the discharge circuit. In order to control the laser output power, the pulse repetition rate is adjusted up to 60Hz and the firing angle of TRIAC gate is varied from 45 to 135. A ZCS(Zero Crossing Switch) circuit and a PIC one-chip microprocessor are used to control the gate signal of the TRIAC precisely. The maximum laser output of 40W is obtained at a total pressure of 18Torr, a pulse repetition rate of 60Hz, and a TRAIC gate firing angle of 90.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.7
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• pp.1303-1310
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• 2016

In this paper, electrocardiogram (ECG) analog front end with supply voltage of 0.5V has been designed and verified by measurements of fabricated chip. ECG is composed of instrument amplifier, 6th order gm-C low pass filter and variable gain amplifier. The instrument amplifier is designed to have gain of 34.8dB and the 6th order gm-C low pass filter is designed to obtain the cutoff frequency of 400Hz. The operational transconductance amplifier of the low pass filter utilizes body-driven differential input stage for low voltage operation. The variable gain amplifier is designed to have gain of 6.1~26.4dB. The electrocardiogram analog front end are fabricated in TSMC $0.18{\mu}m$ CMOS process with chip size of $858{\mu}m{\times}580{\mu}m$. Measurements of the fabricated chip is done not to saturate the gain of ECG by changing the external resistor and measured gain of 28.7dB and cutoff frequency of 0.5 - 630Hz are obtained using the supply voltage of 0.5V.