• Steel and Composite Structures
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• 제16권6호
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• pp.657-679
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• 2014

This paper describes a series of compression tests performed on cold-formed steel channel sections with perforations in the web (thermal studs) fabricated from a galvanized steel plate whose thickness ranged from 1.0 mm to 1.6 mm and nominal yield stress was 295 MPa. The structural behavior and performance of thermal studs undergoing local, distortional, or flexural-torsional buckling were investigated experimentally and analytically. The compression tests indicate that the slits in the web had significant negative effects on the buckling and ultimate strength of thin-walled channel section columns. The compressive strength of perforated thermal studs was estimated using equivalent solid channel sections of reduced thickness instead of the studs. The direct strength method, a newly developed and adopted alternative to the effective width method for designing cold-formed steel sections in the AISI Standard S100 (2004) and AS/NZS 4600 (Standard Australia 2005), was calibrated to the test results for its application to cold-formed channel sections with slits in the web. The results verify that the DSM can predict the ultimate strength of channel section columns with slits in the web by substituting equivalent solid sections of reduced thickness for them.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2012년도 추계학술대회
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• pp.835-837
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• 2012

본 연구에서는 상단게이트와 하단게이트를 갖는 (Double gate ; DG) MOSFET 구조의 소자 파라미터에 따른 전도중심을 분석하였다. 분석학적 모델을 유도하기 위하여 포아송 방정식을 이용하였다. 본 연구에서 제시한 모델을 사용하여 DGMOSFET 설계시 중요한 채널길이, 채널두께, 그리고 게이트 산화막 두께 등의 요소 변화에 대한 전도중심의 변화를 관찰하였다. 또한 채널 도핑농도에 따른 전도중심의 변화를 고찰함으로써 DGMOSFET의 타당한 채널도핑농도를 결정하였다.

• 한국정보통신학회논문지
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• 제18권9호
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• pp.2183-2188
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• 2014

본 연구에서는 비대칭 이중게이트(double gate; DG) MOSFET의 채널 도핑농도 변화에 따른 문턱전압이동 현상에 대하여 분석하였다. 비대칭 DGMOSFET는 일반적으로 저 농도로 채널을 도핑하여 완전결핍상태로 동작하도록 제작한다. 불순물산란의 감소에 의한 고속 동작이 가능하므로 고주파소자에 응용할 수 있다는 장점이 있다. 미세소자에서 필연적으로 발생하고 있는 단채널 효과 중 문턱전압이동현상이 비대칭 DGMOSFET의 채널도핑농도의 변화에 따라 관찰하고자 한다. 문턱전압을 구하기 위하여 해석학적 전위분포를 포아송방정식으로부터 급수형태로 유도하였다. 채널길이와 두께, 산화막 두께 및 도핑분포함수의 변화 등을 파라미터로 하여 도핑농도에 따라 문턱전압의 이동현상을 관찰하였다. 결과적으로 도핑농도가 증가하면 문턱전압이 증가하였으며 채널길이가 감소하면 문턱전압이 크게 감소하였다. 또한 채널두께와 하단게이트 전압이 감소하면 문턱전압이 크게 증가하는 것을 알 수 있었다. 마지막으로 산화막 두께가 감소하면 문턱전압이 증가하는 것을 알 수 있었다.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2014년도 춘계학술대회
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• pp.748-751
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• 2014

본 연구에서는 비대칭 이중게이트(double gate; DG) MOSFET의 채널 도핑농도 변화에 따른 문턱전압이동현상에 대하여 분석하였다. 비대칭 DGMOSFET는 일반적으로 저농도로 채널을 도핑하여 완전결핍상태로 동작하도록 제작한다. 불순물산란의 감소에 의한 고속동작이 가능하므로 고주파소자에 응용할 수 있다는 장점이 있다. 미세소자에서 필연적으로 발생하고 있는 단채널효과 중 문턱전압이동현상이 비대칭 DGMOSFET의 채널도핑농도의 변화에 따라 관찰하고자 한다. 문턱전압을 구하기 위하여 해석학적 전위분포를 포아송방정식으로부터 급수형태로 유도하였다. 채널길이와 두께, 산화막두께 및 도핑분포함수의 변화 등을 파라미터로 하여 도핑농도에 따라 문턱전압의 이동현상을 관찰하였다. 결과적으로 도핑농도가 증가하면 문턱전압이 증가하였으며 채널길이가 감소하면 문턱전압이 크게 감소하였다. 또한 채널두께와 하단게이트 전압이 감소하면 문턱전압이 크게 증가하는 것을 알 수 있었다. 마지막으로 산화막두께가 감소하면 문턱전압이 증가하는 것을 알 수 있었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제10권2호
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• pp.130-133
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• 2010

This paper presents a study of the influence of variation of counter doping thickness on short channel effect in symmetric double-gate (DG) nano MOSFETs. Short channel effects are estimated from the computed values of current-voltage (I-V) characteristics. Two dimensional Quantum transport equations and Poisson equations are used to compute DG MOSFET characteristics. We found that the transconductance ($g_m$) and the drain conductance ($g_d$) increase with an increase in p-type counter-doping thickness ($T_c$). Very high value of transconductance ($g_m=38\;mS/{\mu}m$) is observed at 2.2 nm channel thickness. We have established that the threshold voltage of DG MOSFETs can be tuned by selecting the thickness of counter-doping in such device.

• 한국기계가공학회지
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• 제19권1호
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• pp.114-120
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• 2020

In this study, the process of freezing around two consecutively arranged channel tubes used for evaporator heat exchange was numerically investigated. Numerical results confirmed that the vortex occurred between the front channel and the rear channel and also that the vortex occurred due to the rapid change of the channel at the rear of the rear channel. These vortices were found to play a role in reducing the ice layer to some extent by the growth of the ice layer at the front and rear of the channel tube. The freezing layer showed a tendency to gradually increase as it passed through the channel pipe. As the wall temperature in the channel pipe decreased, the thickness of the freezing layer increased. As the flow rate of water slowed, the thickness of the freezing layer became thicker. In particular, in the case of a slow flow rate of 0.03 m/s, the freezing layers of the front channel pipe and the rear channel pipe were connected to each other. The narrower the channel, the thinner the freezing layer was in both the front and rear channel tubes. It is found that these thin freezing layers are caused by the low thickness of the temperature boundary layer formed around the channel tube.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 하계학술대회 논문집 B
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• pp.1289-1291
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• 1993

The hydrogenation effects on characteristics of polycrystalline silicon thin film transistors(poly-Si TFT's) of which the channel length varies from $2.5{\mu}m\;to\;20{\mu}m$ and poly-Si layer thickness is 50, 100, and 150 nm was investigated. After 1 hr hydrogenation annealing by PECVD, the threshold voltage shift decreased dependent on the channel length, but channel width may not alter the threshold voltage shift. In addition to channel length, the active poly-Si layer thickness may be an important parameter on hydrogenation effects, while gate poly-Si thickness may do not influence on the characteristics of TFT's. Considering our experimental results, we propose that channel length and active poly-Si layer thickness may be a key parameters of hydrogenation of poly-Si TFT's.

• 대한원격탐사학회:학술대회논문집
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• 대한원격탐사학회 2003년도 Proceedings of ACRS 2003 ISRS
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• pp.1255-1257
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• 2003

This study proposes a single-channel satellite remote sensing algorithm for retrieving aerosol optical thickness over global ocean using FY-1C/1D data. An efficient lookup table (LUT)method is adopted in this algorithm to generate apparent reflectance in channel 1 and channel 2 of FY-1C/1D over ocean. The algorithm scale the apparent reflectance in cloud-free conditions to aerosol optical thickness using a state-of-art radiative transfer model 6S with input of the relative spectral response of channel 1 and 2 of FY-1C/1D. Monthly mean composite maps of the aerosol optical thickness have been obtained from FY-1C/1D global area coverage data between 2001 and 2003. Aerosol optical thickness maps can show the major aerosol source which are located off the west coast of northern and southern Africa, Arabian Sea and India Ocean. These result is very similar to other satellite sensors such as AVHRR and MODIS in the location area of heavy aerosol optical thickness over global ocean. The algorithm have been used to FY-1D operational performance and it is the first operational aerosol remote sensing product in China.

• 한국전기전자재료학회논문지
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• 제36권2호
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• pp.129-135
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• 2023

An analytical threshold voltage model is presented to observe the change in threshold voltage shift ΔV_th of a junctionless double gate MOSFET using ferroelectric-metal-SiO₂ as a gate oxide film. The negative capacitance transistors using ferroelectric have the characteristics of increasing on-current and lowering off-current. The change in the threshold voltage of the transistor affects the power dissipation. Therefore, the change in the threshold voltage as a function of theferroelectric thickness is analyzed. The presented threshold voltage model is in a good agreement with the results of TCAD. As a results of our analysis using this analytical threshold voltage model, the change in the threshold voltage with respect to the change in the ferroelectric thickness showed that the threshold voltage increased with the increase of the absolute value of charges in the employed ferroelectric. This suggests that it is possible to obtain an optimum ferroelectric thickness at which the threshold voltage shift becomes 0 V by the voltage across the ferroelectric even when the channel length is reduced. It was also found that the ferroelectric thickness increased as the silicon thickness increased when the channel length was less than 30 nm, but the ferroelectric thickness decreased as the silicon thickness increased when the channel length was 30 nm or more in order to satisfy ΔV_th=0.

• JSTS:Journal of Semiconductor Technology and Science
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• 제10권3호
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• pp.240-250
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• 2010

Double Gate MOSFETs (DG MOSFETs) with doping in one or two thin layers of an otherwise intrinsic channel are simulated to obtain the transport characteristics, threshold voltage and leakage current. Two different device structures- one with doping on two layers near the top and bottom oxide layers and another with doping on a single layer at the centre- are simulated and the variation of device parameters with a change in doping concentration and doping layer thickness is studied. It is observed that an n-doped layer in the channel reduces the threshold voltage and increases the drive current, when compared with a device of undoped channel. The reduction in the threshold voltage and increase in the drain current are found to increase with the thickness and the level of doping of the layer. The leakage current is larger than that of an undoped channel, but less than that of a uniformly doped channel. For a channel with p-doped layer, the threshold voltage increases with the level of doping and the thickness of the layer, accompanied with a reduction in drain current. The devices with doped middle layers and doped gate layers show almost identical behavior, apart from the slight difference in the drive current. The doping level and the thickness of the layers can be used as a tool to adjust the threshold voltage of the device indicating the possibility of easy fabrication of ICs having FETs of different threshold voltages, and the rest of the channel, being intrinsic having high mobility, serves to maintain high drive current in comparison with a fully doped channel.