• Title/Summary/Keyword: Channel Thickness

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Compression tests of cold-formed channel sections with perforations in the web

  • Kwon, Young Bong;Kim, Gap Deuk;Kwon, In Kyu
    • Steel and Composite Structures
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    • v.16 no.6
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    • pp.657-679
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    • 2014
  • This paper describes a series of compression tests performed on cold-formed steel channel sections with perforations in the web (thermal studs) fabricated from a galvanized steel plate whose thickness ranged from 1.0 mm to 1.6 mm and nominal yield stress was 295 MPa. The structural behavior and performance of thermal studs undergoing local, distortional, or flexural-torsional buckling were investigated experimentally and analytically. The compression tests indicate that the slits in the web had significant negative effects on the buckling and ultimate strength of thin-walled channel section columns. The compressive strength of perforated thermal studs was estimated using equivalent solid channel sections of reduced thickness instead of the studs. The direct strength method, a newly developed and adopted alternative to the effective width method for designing cold-formed steel sections in the AISI Standard S100 (2004) and AS/NZS 4600 (Standard Australia 2005), was calibrated to the test results for its application to cold-formed channel sections with slits in the web. The results verify that the DSM can predict the ultimate strength of channel section columns with slits in the web by substituting equivalent solid sections of reduced thickness for them.

Dependence of Conduction Path for Device Parameter of DGMOSFET Using Series (급수를 이용한 DGMOSFET에서 소자 파라미터에 대한 전도중심 의존성)

  • Han, Jihyung;Jung, Hakkee;Jeong, Dongsoo;Lee, Jongin;Kwon, Ohshin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.835-837
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    • 2012
  • In this paper, we have been analyzed conduction path by device parameter of double gate(DG) structure that have top gate and bottom gate. The Possion equation is used to analytical. The change of conduction path have been investigated for various channel lengths, channel thickness and gate oxide thickness using this model, given that these parameters are very important in design of DGMOSFET. The optimum channel doping concentration is determined as the deviation of conduction path is considered according to channel doping concentration.

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Channel Doping Concentration Dependent Threshold Voltage Movement of Asymmetric Double Gate MOSFET (비대칭 이중게이트 MOSFET의 도핑농도에 대한 문턱전압이동)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.9
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    • pp.2183-2188
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    • 2014
  • This paper has analyzed threshold voltage movement for channel doping concentration of asymmetric double gate(DG) MOSFET. The asymmetric DGMOSFET is generally fabricated with low doping channel and fully depleted under operation. Since impurity scattering is lessened, asymmetric DGMOSFET has the adventage that high speed operation is possible. The threshold voltage movement, one of short channel effects necessarily occurred in fine devices, is investigated for the change of channel doping concentration in asymmetric DGMOSFET. The analytical potential distribution of series form is derived from Possion's equation to obtain threshold voltage. The movement of threshold voltage is investigated for channel doping concentration with parameters of channel length, channel thickness, oxide thickness, and doping profiles. As a result, threshold voltage increases with increase of doping concentration, and that decreases with decrease of channel length. Threshold voltage increases with decrease of channel thickness and bottom gate voltage. Lastly threshold voltage increases with decrease of oxide thickness.

Threshold Voltage Movement for Channel Doping Concentration of Asymmetric Double Gate MOSFET (도핑농도에 따른 비대칭 이중게이트 MOSFET의 문턱전압이동현상)

  • Jung, Hakkee;Lee, jongin;Jeong, Dongsoo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.05a
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    • pp.748-751
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    • 2014
  • This paper has analyzed threshold voltage movement for channel doping concentration of asymmetric double gate(DG) MOSFET. The asymmetric DGMOSFET is generally fabricated with low doping channel and fully depleted under operation. Since impurity scattering is lessened, asymmetric DGMOSFET has the adventage that high speed operation is possible. The threshold voltage movement, one of short channel effects necessarily occurred in fine devices, is investigated for the change of channel doping concentration in asymmetric DGMOSFET. The analytical potential distribution of series form is derived from Possion's equation to obtain threshold voltage. The movement of threshold voltage is investigated for channel doping concentration with parameters of channel length, channel thickness, oxide thickness, and doping profiles. As a result, threshold voltage increases with increase of doping concentration, and that decreases with decrease of channel length. Threshold voltage increases with decrease of channel thickness and bottom gate voltage. Lastly threshold voltage increases with decrease of oxide thickness.

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Effect of Counter-doping Thickness on Double-gate MOSFET Characteristics

  • George, James T.;Joseph, Saji;Mathew, Vincent
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.2
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    • pp.130-133
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    • 2010
  • This paper presents a study of the influence of variation of counter doping thickness on short channel effect in symmetric double-gate (DG) nano MOSFETs. Short channel effects are estimated from the computed values of current-voltage (I-V) characteristics. Two dimensional Quantum transport equations and Poisson equations are used to compute DG MOSFET characteristics. We found that the transconductance ($g_m$) and the drain conductance ($g_d$) increase with an increase in p-type counter-doping thickness ($T_c$). Very high value of transconductance ($g_m=38\;mS/{\mu}m$) is observed at 2.2 nm channel thickness. We have established that the threshold voltage of DG MOSFETs can be tuned by selecting the thickness of counter-doping in such device.

Numerical Analysis of Freezing Phenomena of Water around the Channel Tube of MF Evaporator (MF증발기 채널관 주위의 결빙현상에 대한 해석적 연구)

  • Park, Yong-Seok;Seong, Hong-Seok;Suh, Jeong-Se
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.19 no.1
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    • pp.114-120
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    • 2020
  • In this study, the process of freezing around two consecutively arranged channel tubes used for evaporator heat exchange was numerically investigated. Numerical results confirmed that the vortex occurred between the front channel and the rear channel and also that the vortex occurred due to the rapid change of the channel at the rear of the rear channel. These vortices were found to play a role in reducing the ice layer to some extent by the growth of the ice layer at the front and rear of the channel tube. The freezing layer showed a tendency to gradually increase as it passed through the channel pipe. As the wall temperature in the channel pipe decreased, the thickness of the freezing layer increased. As the flow rate of water slowed, the thickness of the freezing layer became thicker. In particular, in the case of a slow flow rate of 0.03 m/s, the freezing layers of the front channel pipe and the rear channel pipe were connected to each other. The narrower the channel, the thinner the freezing layer was in both the front and rear channel tubes. It is found that these thin freezing layers are caused by the low thickness of the temperature boundary layer formed around the channel tube.

Analysis of hydrogenation effects on Low temperature Poly-Si Thin Film Transistor (저온에서 제작된 다결정 실리콘 박막 트랜지스터의 수소화 효과에 대한 분석)

  • Choi, K.Y.;Kim, Y.S.;Lee, S.K.;Lee, M.C.;Han, M.K.
    • Proceedings of the KIEE Conference
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    • 1993.07b
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    • pp.1289-1291
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    • 1993
  • The hydrogenation effects on characteristics of polycrystalline silicon thin film transistors(poly-Si TFT's) of which the channel length varies from $2.5{\mu}m\;to\;20{\mu}m$ and poly-Si layer thickness is 50, 100, and 150 nm was investigated. After 1 hr hydrogenation annealing by PECVD, the threshold voltage shift decreased dependent on the channel length, but channel width may not alter the threshold voltage shift. In addition to channel length, the active poly-Si layer thickness may be an important parameter on hydrogenation effects, while gate poly-Si thickness may do not influence on the characteristics of TFT's. Considering our experimental results, we propose that channel length and active poly-Si layer thickness may be a key parameters of hydrogenation of poly-Si TFT's.

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Development of Aerosol Retrieval Algorithm Over Ocean Using FY-1C/1D Data

  • Xiuqing, Hu;Naimeng, Lu;Hong, Qiu
    • Proceedings of the KSRS Conference
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    • 2003.11a
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    • pp.1255-1257
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    • 2003
  • This study proposes a single-channel satellite remote sensing algorithm for retrieving aerosol optical thickness over global ocean using FY-1C/1D data. An efficient lookup table (LUT)method is adopted in this algorithm to generate apparent reflectance in channel 1 and channel 2 of FY-1C/1D over ocean. The algorithm scale the apparent reflectance in cloud-free conditions to aerosol optical thickness using a state-of-art radiative transfer model 6S with input of the relative spectral response of channel 1 and 2 of FY-1C/1D. Monthly mean composite maps of the aerosol optical thickness have been obtained from FY-1C/1D global area coverage data between 2001 and 2003. Aerosol optical thickness maps can show the major aerosol source which are located off the west coast of northern and southern Africa, Arabian Sea and India Ocean. These result is very similar to other satellite sensors such as AVHRR and MODIS in the location area of heavy aerosol optical thickness over global ocean. The algorithm have been used to FY-1D operational performance and it is the first operational aerosol remote sensing product in China.

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Analytical Model of Threshold Voltage for Negative Capacitance Junctionless Double Gate MOSFET Using Ferroelectric (강유전체를 이용한 음의 정전용량 무접합 이중 게이트 MOSFET의 문턱전압 모델)

  • Hakkee Jung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.36 no.2
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    • pp.129-135
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    • 2023
  • An analytical threshold voltage model is presented to observe the change in threshold voltage shift ΔVth of a junctionless double gate MOSFET using ferroelectric-metal-SiO2 as a gate oxide film. The negative capacitance transistors using ferroelectric have the characteristics of increasing on-current and lowering off-current. The change in the threshold voltage of the transistor affects the power dissipation. Therefore, the change in the threshold voltage as a function of theferroelectric thickness is analyzed. The presented threshold voltage model is in a good agreement with the results of TCAD. As a results of our analysis using this analytical threshold voltage model, the change in the threshold voltage with respect to the change in the ferroelectric thickness showed that the threshold voltage increased with the increase of the absolute value of charges in the employed ferroelectric. This suggests that it is possible to obtain an optimum ferroelectric thickness at which the threshold voltage shift becomes 0 V by the voltage across the ferroelectric even when the channel length is reduced. It was also found that the ferroelectric thickness increased as the silicon thickness increased when the channel length was less than 30 nm, but the ferroelectric thickness decreased as the silicon thickness increased when the channel length was 30 nm or more in order to satisfy ΔVth=0.

Threshold Voltage Control through Layer Doping of Double Gate MOSFETs

  • Joseph, Saji;George, James T.;Mathew, Vincent
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.3
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    • pp.240-250
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    • 2010
  • Double Gate MOSFETs (DG MOSFETs) with doping in one or two thin layers of an otherwise intrinsic channel are simulated to obtain the transport characteristics, threshold voltage and leakage current. Two different device structures- one with doping on two layers near the top and bottom oxide layers and another with doping on a single layer at the centre- are simulated and the variation of device parameters with a change in doping concentration and doping layer thickness is studied. It is observed that an n-doped layer in the channel reduces the threshold voltage and increases the drive current, when compared with a device of undoped channel. The reduction in the threshold voltage and increase in the drain current are found to increase with the thickness and the level of doping of the layer. The leakage current is larger than that of an undoped channel, but less than that of a uniformly doped channel. For a channel with p-doped layer, the threshold voltage increases with the level of doping and the thickness of the layer, accompanied with a reduction in drain current. The devices with doped middle layers and doped gate layers show almost identical behavior, apart from the slight difference in the drive current. The doping level and the thickness of the layers can be used as a tool to adjust the threshold voltage of the device indicating the possibility of easy fabrication of ICs having FETs of different threshold voltages, and the rest of the channel, being intrinsic having high mobility, serves to maintain high drive current in comparison with a fully doped channel.