• KSII Transactions on Internet and Information Systems (TIIS)
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• v.6 no.7
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• pp.1815-1830
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• 2012

Existing R-tree that is based on a variety of outdoor-based techniques to manage moving objects have been investigated. Due to the different characteristics of the indoor and outdoor, it is difficult to management of moving object using existed methods in indoor setting. We propose a new index structure called ACII(adaptive Cell-based index for Indoor moving objects) for Indoor moving objects. ACII is Cell-based access structure adopting an overlapping technique. The ACII refines cells adaptively to handle indoor regional data, which may change its locations over time. The ACII consumed at most 30% of the space required by R-tree based methods, and achieved higher query performance compared with r-tree based methods.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.69-70
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• 2006

A detailed Investigation of cell structure and electrical characteristic in chalcogenide-based phase-change random access memory(PRAM) devices is presented. We used compound of Ge-Sb-Te material for phase-change cell. A novel bottom electrode structure and manufacture are described. We used heat radiator structure for improved reset characteristic. A resistance change measurement is performed on the test chip. From the resistance change, we could observe faster reset characteristic.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.3
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• pp.268-273
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• 2014

The forming, reset and set operation of bipolar resistive random access memory (RRAM) have been predicted by using a finite element (FE) model which includes interface effects. To the best of our knowledge, our bipolar RRAM model is applicable to realistic cell structure optimization because our model is based on the FE method (FEM) unlike precedent models.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.10 s.340
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• pp.1-8
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• 2005

In this paper, a FRAM design style based on PMOS-gating cell structure is described. The memory cell consists of a PMOS access transistor and a ferroelectric capacitor. Its plate is grounded. The proposed scheme employs three novel operating methods: 1) $V_{DD}$ precharged bitline, 2) negative-voltage wordline technique and 3) negative-pulse restore, Because this configuration doesn`t need the on-pitch plate control circuitry, it is effective in realizing cost-effective chip sizes. Implementation for a 2.5-V, 1-Mb FRAM prototype design in a $0.25-{\mu}m$, triple-well technology shows a chip size of $3.22\;mm^{2}$, an access time of 48 ns and an active current of 11 mA. The cell efficiency is 62.52 $\%$. It has gained approximately $20\;\%$ improvement in the cell array efficiency over the conventional plate-driven FRAM scheme.

• Journal of Communications and Networks
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• v.7 no.2
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• pp.115-125
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• 2005

This paper discusses how to effectively design a next-generation wireless communication system that can possibly provide very high data-rate transmissions and versatile quality services. In order to accommodate the sophisticated user requirements and diversified user environments of the next-generation systems, it should be designed to take an efficient and flexible structure for multiple access and resource allocation. In addition, the design should be optimized for cost-effective usage of resources and for efficient operation in a multi-cell environment. As orthogonal frequency division multiple access (OFDMA) has turned out in recent researches to be one of the most promising multiple access techniques that can possibly meet all those requirements through efficient radio spectrum utilization, we take OFDMA as the basic framework in the next-generation wireless communications system design. So, in this paper, we focus on introducing an OFDMA-based downlink system design that employs the techniques of hybrid multiple access (HMA) and frequency group (FG) in conjunction with intra-frequency group averaging (IFGA). The HMA technique combines various multiple access schemes on the basis of OFDMA system, adopting the multiple access scheme that best fits to the given user condition in terms of mobility, service, and environment. The FG concept and IFGA technique help to reduce the feedback overhead of OFDMA system and the other-cell interference (OCI) problem by grouping the sub-carriers based on coherence band-widths and by harmonizing the channel condition and OCI of the grouped sub-carriers.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.863-866
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• 2003

Recently, there has been growing interests in the magneto-resistive random access memory (MRAM) because of its great potential as a future nonvolatile memory. In this paper, a CMOS macro-model for MRAM cell based on a twin cell structure is proposed. The READ and WRITE operations of the MTJ cell can be emulated by adopting data latch and switch blocks. The behavior of the circuit is confirmed by HSPICE simulations in a 0.35-${\mu}{\textrm}{m}$ CMOS process. We expect the macro model can be utilized to develope the core architecture and the peripheral circuitry. It can also be used for the characterization and the direction of the real MTJ cells.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.4
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• pp.205-210
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• 2003

A 3-Transistor cell CMOS OTP ROM array using standard CMOS antifuse (AF) based on permanent breakdown of MOSFET gate oxide is proposed, fabricated and characterized. The proposed 3-T OTP cell for ROM array is composed of an nMOS AF, a high voltage (HV) blocking nMOS, and cell access transistor, all compatible with standard CMOS technology. The experimental results show that the proposed structure can be a viable technology option as a high density OTP ROM array for modern digital as well as analog circuits.

• Journal of Internet Computing and Services
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• v.11 no.3
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• pp.43-51
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• 2010

In this paper, we evaluate the system throughput and the method of optimal wireless resource allocation for the access zone (AZ) and relay zone (RZ) in downlink when the cell coverage is extended using the non-transparent Relay Station (RS) in a 2-hop cellular relay system based on IEEE802.16j, which uses the OFDMA-TDD structure. For the analyses, we first introduce the MAC (Media Access Control) frame structure in the non-transparent mode, then we investigate the interfering elements in both AZ and RZ for the network devices such as the Mobile Station (MS) and RS. Through computer simulation, we analyze the cell coverage extension and system throughput in terms of the distance between Base Station (BS) and RS, then we present the amount of the optimal allocation of wireless resource for the AZ and RZ in downlink using our results.

• Proceedings of the KIEE Conference
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• 2007.11a
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• pp.106-107
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• 2007

A detailed investigation of cell structure and electrical characteristic in chalcogenide-based phase-change random access memory(PRAM) devices is presented. We used compound of Ge-Se-Te material for phase-change cell. Actually, the performance properties have been improved surprisingly then conventional Ge-Sb-Te. However, crystallization time was as long as ever for amorphization time. We conducted this experiment in order to solve that problem by doping-Sb with annealing.

• Advances in nano research
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• v.15 no.6
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• pp.521-531
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• 2023

Quantum-dot cellular automata (QCA) has shown great potential in the nanoscale regime as a replacement for CMOS technology. This work presents a specific approach to static random-access memory (SRAM) cell based on 2:1 multiplexer, 4-bit SRAM array, and 32-bit SRAM array in QCA. By utilizing the proposed SRAM array, a single-layer 16×32-bit SRAM with the read/write capability is presented using an optimized signal distribution network (SDN) crossover technique. In the present study, an extremely-optimized 2:1 multiplexer is proposed, which is used to implement an extremely-optimized SRAM cell. The results of simulation show the superiority of the proposed 2:1 multiplexer and SRAM cell. This study also provides a more efficient and accurate method for calculating QCA costs. The proposed extremely-optimized SRAM cell and SRAM arrays are advantageous in terms of complexity, delay, area, and QCA cost parameters in comparison with previous designs in QCA, CMOS, and FinFET technologies. Moreover, compared to previous designs in QCA and FinFET technologies, the proposed structure saves total energy consisting of overall energy consumption, switching energy dissipation, and leakage energy dissipation. The energy and structural analyses of the proposed scheme are performed in QCAPro and QCADesigner 2.0.3 tools. According to the simulation results and comparison with previous high-quality studies based on QCA and FinFET design approaches, the proposed SRAM reduces the overall energy consumption by 25%, occupies 33% smaller area, and requires 15% fewer cells. Moreover, the QCA cost is reduced by 35% compared to outstanding designs in the literature.