• Journal of Power Electronics
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• 제8권2호
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• pp.171-180
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• 2008

One of the major problems in electric power quality is the harmonic contents. There are several methods of indicating the quantity of harmonic contents. The most widely used measure is the total harmonic distortion (THD). Various switching techniques have been used in static converters to reduce the output harmonic content. This paper presents and compares the two harmonic optimization techniques, known as optimal minimization of the total harmonic distortion (OMTHD) technique and optimized harmonic stepped-waveform (OHSW) technique used in multi-level inverters with unequal dc sources. Both techniques are very effective and efficient for improving the quality of the inverter output voltage. First, we describe briefly the cascaded H-bridge multi-level inverter structure. Then, we present the switching algorithm for the inverter based on OHSW and OMTHD techniques. Finally, the results obtained for the two techniques are analyzed and compared. The results verify the effectiveness of the both techniques in multi-level voltage-source inverter with non-equal dc sources, clarifying the advantages of each technique.

• Journal of Electrical Engineering and Technology
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• 제10권4호
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• pp.1552-1557
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• 2015

The paper unleashes a new idea to arrive at reduced switch count topological structures configured in the form of a matrix for a cascaded Multi level inverter (CMLI). The theory encircles to minimize the number of switches involved in the conduction path and there from acclaim reduced input current distortion, lower switching losses and electromagnetic interference. The focus extends to standardize the number of power devices required for reaching different levels of output voltage from the same architecture. It includes appropriate pulse width modulation (PWM) strategy to generate firing pulses and ensure the desired operation of the power modules. The investigative study carries with it MATLAB based simulation and experimental results obtained using suitable prototypes to illustrate the viability of the proposed concept. The promising nature of the performance projects a new dimension in the use of single phase MLIs for renewable energy related applications.

• 조명전기설비학회논문지
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• 제27권12호
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• pp.133-140
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• 2013

Cascaded H-Bridge multi-level inverters can be implemented through the series connection of single-phase modular power bridges. In recent years, multi-level inverters are becoming increasingly popular for high power applications due to its improved harmonic profile and increased power ratings. This paper presents a control method for balancing the dc-link voltage and ride-through enhancement, a modified pulse width-modulation Compensation algorithm of cascaded H-bridge multi-level inverters. During an under-voltage protection mechanism, causing the system to shut down within a few milliseconds after a power interruption in the main input sources. When a power interruption occurs finish, if the system is a large inertia restarting the load a long time is required. This paper suggests modifications in the control algorithm in order to improve the sag ride-through performance of ac inverter. The new proposed strategy recommends maintaining the DC-link voltage constant at the nominal value during a sag period, experimental results are presented.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.321-324
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• 2000

멀티-레벨 인버터 구조는 크게 세 가지가 있다 NPC 구조, 플라잉 커패시터 구조, 그리고 H-bridge 단위 인버터 셀을 종속적으로 연결한 cascaded 구조가 그것이다. 이중에서 cascaded 구조는 지금까지 홀수 레벨만 존재하는 것으로 알려졌다 본 논문에서는 이것을 짝수 레벨로 확장한 새로운 구조를 제안하고 홀수 짝수 레벨 모두에 적용이 가능한 새로온 PWM 기법을 제안하고자 한다. 제안한 기법은 컴퓨터 시뮬레이션 및 실험으로 그타당성을 입증하고자 한다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 추계학술대회 논문집
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• pp.171-174
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• 2002

This paper deals with a novel method in order to analyze the harmonic characteristics in the multi-level inverter. Generally, the magnitude of harmonic components is different according to the carrier PWM techniques, modulation Index(Mi), and the level of multi-level inverter The previous papers analyzed the harmonic characteristics from the viewpoint of the space vector. Hence, the calculation of the harmonic vector becomes difficult and complex in 4-level or more than S-level. However, the proposed method of this paper reduced an amount of calculation and simplified the process of calculation by using the relationship between reference voltage and output phase voltage to load neutral. This paper analyzed the harmonic and it is applied to the multi-carrier PWM techniques in 5- level and other-level of cascaded inverter system.

• 한국마린엔지니어링학회:학술대회논문집
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• 한국마린엔지니어링학회 2005년도 후기학술대회논문집
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• pp.200-201
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• 2005

This paper is analyzed a new modulation method of OSW(Optimized Sine-Wave) modulation strategy for cascaded H-bridge multi-level inverter. The inverter structure was modified with the maximum output voltage level, and the switching angle was calculated easily to adjust the requested Vrms of the output. The suggested modulation method could make output waveform very close to the ideal sine wave, and the THD value was improved also remarkably.

• 전력전자학회논문지
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• 제18권5호
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• pp.422-428
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• 2013

Recently, we use a static synchronous compensator(STATCOM) with cascaded H-bride topologies, because it is easy to increase capacity and to reduce total harmonic distortion(THD). When we use equipment for reactive power compensation, dc-link voltage unbalances occur from several reasons although loads are balanced. In the past, switching pattern change of single phase inverter and reference voltage magnitude change of inverter equipped with power sensor have been used for dc-link voltage balance. But previous methods are more complicated and expensive because of additional component costs. Therefore, this paper explains reasons of dc-link voltage unbalance and proposes solution. This solution is complex method that is composed of reference voltage magnitude change of inverter without additional hardware and shifted phase angle of inverter reference voltages change. It proves possibility through 1000[KVA] system simulation.

• 전력전자학회논문지
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• 제16권3호
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• pp.283-292
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• 2011

본 논문에서는 기존의 멀티레벨 인버터와는 달리 DC링크단에 스위치를 설치함으로써 성능을 향상시킨 새로운 형태의 H-브리지 멀티레벨 인버터를 제안한다. 제안된 방식은 계통 연계형 단상 멀티레벨 인버터로서 기존의 단상인버터에 비하여 출력 전압 파형이 정현파에 가깝고, 고압 대용량 시스템용 멀티레벨 인버터로의 확장도 용이할 뿐만 아니라 직렬연결을 통하여 간단히 전압레벨을 확장할 수 있다는 장점을 갖는다. 동일한 5레벨의 경우 기존의 H-브리지 직렬형이나 NPC형 멀티레벨 인버터는 가제어 스위치가 8개 사용되는 반면에 제안한 멀티레벨 인버터는 가제어 스위치가 6개 사용되기 때문에 회로 구성이 간단하여 신뢰도가 높고 경제적인 구현이 가능하고 스위칭 손실이 줄어서 효율이 향상되는 특징이 있다. POD 변조기법을 기반으로 하여 반송파 신호 하나만을 사용하는 새로운 PWM 방법을 제시하였으며 DC링크 커패시터 전압의 균형을 위한 스위칭 시퀀스에 대해서도 검토하였다. 제안된 토폴로지의 타당성을 시뮬레이션과 실험을 통하여 확인하였다.

• 전력전자학회논문지
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• 제26권1호
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• pp.59-65
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• 2021

This study proposes a dead-time implementation method suitable for cell voltage control of a cascaded H-bridge (CHB) inverter. The PWM module of an existing microcontroller cannot generate a maximum voltage due to the dead-time effect when used as the cell controller of the CHB inverter. In the proposed method, the operation method of the PWM module was changed without using the dead time module included in the existing microcontroller, so that the cell output voltage can be increased to the maximum voltage without voltage discontinuity. During the maximum voltage generation period, the full turn-on state can be maintained without unnecessary switching. The validity of the proposed method is confirmed through an experiment.

• 전기학회논문지
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• 제67권7호
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• pp.846-853
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• 2018

In this paper, an improved model predictive control (MPC) method is proposed, which reduces the amount of calculations caused by the increased number of candidate voltage vectors with the increased voltage level in multi-level inverters. When the conventional MPC method is used for multi-level inverters, all candidate voltage vectors are considered to predict the next-step current value. However, in the case that the sampling time is short, increased voltage level makes it difficult to consider the all candidate voltage vectors. In this paper, the improved MPC method which can get a fast transient response is proposed with a small amount of the computation by adding new candidate voltage vectors that are set to find the optimal vector. As a result, the proposed method shows faster transient response than the method that considers the adjacent vectors and reduces the computational burden compared to the method that considers the whole voltage vector. the performance of the proposed method is verified through simulations and experiments.