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http://dx.doi.org/10.5370/JEET.2015.10.4.1552

A New Cascaded Multilevel Inverter Topology with Voltage Sources Arranged in Matrix Structure  

Thamizharasan, S. (Dept. of Electrical and Electronics Engineering, Adhiparasakthi Engineering college)
Baskaran, J. (Dept. of Electrical and Electronics Engineering, RMD Engineering College)
Ramkumar, S. (Dept. of Electrical and Electronics Engineering, Surya Group of Institutions)
Publication Information
Journal of Electrical Engineering and Technology / v.10, no.4, 2015 , pp. 1552-1557 More about this Journal
Abstract
The paper unleashes a new idea to arrive at reduced switch count topological structures configured in the form of a matrix for a cascaded Multi level inverter (CMLI). The theory encircles to minimize the number of switches involved in the conduction path and there from acclaim reduced input current distortion, lower switching losses and electromagnetic interference. The focus extends to standardize the number of power devices required for reaching different levels of output voltage from the same architecture. It includes appropriate pulse width modulation (PWM) strategy to generate firing pulses and ensure the desired operation of the power modules. The investigative study carries with it MATLAB based simulation and experimental results obtained using suitable prototypes to illustrate the viability of the proposed concept. The promising nature of the performance projects a new dimension in the use of single phase MLIs for renewable energy related applications.
Keywords
Cascaded multilevel inverter; Carrier PWM; Matrix structure; Reduced count topology;
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1 G. Ceglia, V. Guzman, C. Sanchez, F. Ibanez, J. Walter, and M. I. Gimenez, “A new simplified multilevel inverter topology for dc-ac conversion,” IEEE Trans. Power Electron., vol. 21, no. 5, pp. 1311-1319, Sep. 2006.   DOI   ScienceOn
2 N. A. Rahim, K. Chaniago, and J. Selvaraj, “Single-phase seven-level grid-connected inverter for photo-voltaic system,” IEEE Trans. Ind. Electron., vol. 58, no. 6, pp. 2435-2443, Jun. 2011.   DOI   ScienceOn
3 J. Selvaraj and N. A. Rahim, “Multilevel inverter for grid-connected PV system employing digital PI controller,” IEEE Trans. Ind. Electron., vol. 56, no. 1, pp. 149-158, Jan. 2009.   DOI
4 Sung Geun Song, Feel Soon Kang and Sung-Jun Park, “Cascaded multilevel inverter employing three phase transformers and single dc input” IEEE Trans. Ind. Electron., vol. 56, no. 6, pp. 2005-2014, June. 2009.   DOI   ScienceOn
5 J. Rodriguez, J. Lai and F. Z. Peng, “Multilevel inverters: a survey of topologies, controls, and applications,” IEEE Trans. Ind. Electron., Vol. 49, No. 4, pp. 724-738, Aug. 2002.   DOI   ScienceOn
6 M. Manjrekar, P. K. Steimer and T. Lipo, “Hybrid multilevel power conversion system: a competitive solution for high-power applications,” IEEE Trans. Ind. Appl., Vol. 36, No. 3, pp. 834-841, May/Jun. 2000.   DOI   ScienceOn
7 Z. Du, L. M. Tolbert, J. N. Chiasson and B. Ozpineci, “A cascade multilevel inverter using a single dc power source,” in Proceeding of APEC, pp. 426-430, 2006.
8 R. Teodorescu, F. Blaabjerg, J. K. Pedersen, E. Cengelci, and P. N. Enjeti, “Multilevel inverter by cascading industrial VSI,” IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 832-838, Aug. 2002.
9 E. Beser, B. Arifoglu, S. Camur, and E. K. Beser, “Design and application of a single phase multilevel inverter suitable for using as a voltage harmonic source,” J. Power Electron., vol. 10, no. 2, pp. 138-145, Mar. 2010.   DOI   ScienceOn
10 D. A. B. Zambra, C. Rech, and J. R. Pinheiro, “A comparative analysis between the symmetric and the hybrid asymmetric nine-level series connected H-bridge cells inverter,” in Proc. Eur. Conf. Power Electron. Appl., 2007, pp. 1-10.
11 E. Babaei, S. H. Hosseini, G. B. Gharehpetian, M. T. Haque, and M. Sabahi, “Reduction of DC voltage sources and switches in asymmetrical multilevel converters using a novel topology,” J. Elect. Power Syst.Res., vol. 77, no. 8, pp. 1073-1085, Jun. 2007.   DOI   ScienceOn
12 Ramkumar S, Kamaraj V, Thamizharasan S, Jeevananthan S,” A new series parallel switched multilevel dc-link inverter topology”, Int J Electr Power and Energy Syst, Vol. 36, Pg: 93-99, 2012.   DOI   ScienceOn
13 R. H. Baker and L. H. Bannister, "Electric power converter," U.S. Patent, 3 867 643, Feb. 1975.
14 R. H. Baker, "High-voltage converter circuit," U.S. Patent, 04 203 151, May 1980.
15 A. Nabae, I. Takahashi and H. Akagi, “A new neutralpoint clamped PWM inverter,” in Proceeding of IAS, pp. 761-766, 1980.
16 T. A. Meynard and H. Foch, “Multi-level conversion:high voltage choppers and voltage source inverters,” in Proceeding of PESC, Vol. 1, pp. 397-403, 1992.
17 C. Rech and J. R. Pinheiro, “Hybrid multilevel converters:Unified analysis and design considerations,” IEEE Trans. Ind. Electron., Vol. 54, No. 2, pp. 1092-1104, Apr. 2007.   DOI   ScienceOn
18 M. R. Baiju, K. Gopakumar, K. K. Mohapatra, V. T. Somasekhar and L. Umannand, “A high resolution multilevel voltage space phasor generation for an open-end winding induction motor drive,” European Power Electronics and Drive Journal, Vol. 13, No. 4, pp. 29-37, Sep./Oct./Nov. 2003.   DOI   ScienceOn
19 K. A. Corzine, M. W. Wielebski, F. Z. Peng and J. Wang, “Control of cascaded multi-level inverters,” IEEE Trans. Power Electron., Vol. 19, No. 3, pp. 732-738, May 2004.   DOI   ScienceOn
20 H. Stemmler and P. Guggenbach, “Configurations of high-power voltage source inverters drives,” in Proceeding of European Conference on Power Electronics and Applications, Vol. 5, pp. 7-14, 1993.