• Journal of Electrical Engineering and information Science
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• v.2 no.6
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• pp.208-211
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• 1997

We have fabricated a single-electron-tunneling(SET) transistor with a dual gate geometry based on the SOI structure prepared by SIMOX wafers. The split-gate is the lower-gate is the lower-level gate and located ∼ 100${\AA}$ right above the inversion layer 2DEG active channel, which yields strong carrier confinement with fully controllable tunneling potential barrier. The transistor is operating at low temperatures and exhibits the single electron tunneling behavior through nano-size quantum dot. The Coulomb-Blockade oscillation is demonstrated at 15mK and its periodicity of 16.4mV in the upper-gate voltage corresponds to the formation of quantum dots with a capacity of 9.7aF. For non-linear transport regime, Coulomb-staircases are clearly observed up to four current steps in the range of 100mV drain-source bias. The I-V characteristics near the zero-bias displays typical Coulomb-gap due to one-electron charging effect.

• Current Optics and Photonics
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• v.3 no.6
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• pp.583-589
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• 2019

We report experimental results on 940-nm 350-mW AlGaAs/InGaAs transverse single-mode laser diodes (LDs) adopting graded-index separate confinement heterostructures (GRIN-SCH) and p,n-clad asymmetric structures, with improved temperature and small-divergence beam characteristics under high-output-power operation, for a three-dimensional (3D) motion-recognition sensor. The GRIN-SCH design provides good carrier confinement and prevents current leakage by adding a grading layer between cladding and waveguide layers. The asymmetric design, which differs in refractive-index distribution of p-n cladding layers, reduces the divergence angle at high-power operation and widens the transverse mode distribution to decrease the power density around emission facets. At an optical power of 350 mW under continuous-wave (CW) operation, Gaussian narrow far-field patterns (FFP) are measured with the full width at half maximum vertical divergence angle to be 18 degrees. A threshold current (I_th) of 65 mA, slope efficiency (SE) of 0.98 mW/mA, and operating current (I_op) of 400 mA are obtained at room temperature. Also, we could achieve catastrophic optical damage (COD) of 850 mW and long-term reliability of 60℃ with a TO-56 package.

• Korean Journal of Materials Research
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• v.28 no.2
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• pp.124-128
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• 2018

N-type porous silicon (PS) layers and thermally oxidized PS layers have been characterized by various measuring techniques such as photoluminescence (PL), Raman spectroscopy, IR, HRSEM and transmittance measurements. The top surface of PS layer shows a stronger photoluminescence peak than its bottom part, and this is ascribed to the difference in number of fine silicon particles of 2~3 nm in diameter. Observed characteristics of PL spectra are explained in terms of microstructures in the n-type PS layers. Common features for both p-type and n-type PS layers are as follows: the parts which can emit visible photoluminescence are not amorphous, but crystalline, and such parts are composed of nanocrystallites of several nm's whose orientations are slightly different from Si substrate, and such fine silicon particles absorb much hydrogen atoms near the surfaces. Light emission is strongly dependent on such fine silicon particles. Photoluminescence is due to charge carrier confinement in such three dimensional structure (sponge-like structure). Characteristics of visible light emission from n-type PS can be explained in terms of modification of band structure accompanied by bandgap widening and localized levels in bandstructure. It is also shown that hydrogen and oxygen atoms existing on residual silicon parts play an important role on emission stability.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.9 s.339
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• pp.9-18
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• 2005

To make high-performance, low-power transistors beyond the technology node of 60 nm complementary metal-oxide-semiconductor field-effect transistors(C-MOSFETs) possible, the effect of electron mobility of the thickness of strained Si grown on a relaxed SiGe/SiO2/Si was investigated from the viewpoint of mobility enhancement via two approaches. First the parameters for the inter-valley phonon scattering model were optimized. Second, theoretical calculation of the electronic states of the two-fold and four-fold valleys in the strained Si inversion layer were performed, including such characteristics as the energy band diagrams, electron populations, electron concentrations, phonon scattering rate, and phonon-limited electron mobility. The electron mobility in an silicon germanium on insulator(SGOI) n-MOSFET was observed to be about 1.5 to 1.7 times higher than that of a conventional silicon on insulator(SOI) n-MOSFET over the whole range of Si thickness in the SOI structure. This trend was good consistent with our experimental results. In Particular, it was observed that when the strained Si thickness was decreased below 10 nm, the phonon-limited electron mobility in an SGOI n-MOSFT with a Si channel thickness of less than 6 nm differed significantly from that of the conventional SOI n-MOSFET. It can be attributed this difference that some electrons in the strained SGOI n-MOSFET inversion layer tunnelled into the SiGe layer, whereas carrier confinement occurred in the conventional SOI n-MOSFET. In addition, we confirmed that in the Si thickness range of from 10 nm to 3 nm the Phonon-limited electron mobility in an SGOI n-MOSFET was governed by the inter-valley Phonon scattering rate. This result indicates that a fully depleted C-MOSFET with a channel length of less than 15 m should be fabricated on an strained Si SGOI structure in order to obtain a higher drain current.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.8
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• pp.752-758
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• 2004

This paper reports on the DC and RF characteristics of AlGaN/InGaN/GaN high electron-mobility transistors (HEMTs) grown by molecular beau epitaxy(MBE) on sapphire substrates. The devices with a 0.5 ${\mu}$m gate-length exhibited relatively flat transconductance(g$\_$m/), which results from the enhanced carrier confinement of the InGaN channel. The maximum drain current was 880 mA/mm with a peak g$\_$m/ of 156 mS/mm, an f$\_$T/ of 17.3 GHz, and an f$\_$MAX/ or 28.7 GHz. In addition to promising DC and RF results, pulsed I-V and current-switching measurements showed little dispersion in the unpassivated AlGaN/InGaN HEMTs. These results suggest that the addition of In to the GaN channel improves the electron transport characteristics as well as suppressing current collapse that is related to the surface trap states.

• Advances in nano research
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• v.2 no.1
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• pp.1-14
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• 2014

Dislocations are basic crystal defects and represent one-dimensional native nanostructures embedded in a perfect crystalline matrix. Their structure is predefined by crystal symmetry. Two-dimensional, self-organized arrays of such nanostructures are realized reproducibly using specific preparation conditions (semiconductor wafer direct bonding). This technique allows separating dislocations up to a few hundred nanometers which enables electrical measurements of only a few, or, in the ideal case, of an individual dislocation. Electrical properties of dislocations in silicon were measured using MOSFETs as test structures. It is shown that an increase of the drain current results for nMOSFETs which is caused by a high concentration of electrons on dislocations in p-type material. The number of electrons on a dislocation is estimated from device simulations. This leads to the conclusion that metallic-like conduction exists along dislocations in this material caused by a one-dimensional carrier confinement. On the other hand, measurements of pMOSFETs prepared in n-type silicon proved the dominant transport of holes along dislocations. The experimentally measured increase of the drain current, however, is here not only caused by an higher hole concentration on these defects but also by an increasing hole mobility along dislocations. All the data proved for the first time the ambipolar behavior of dislocations in silicon. Dislocations in p-type Si form efficient one-dimensional channels for electrons, while dislocations in n-type material cause one-dimensional channels for holes.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.11
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• pp.29-34
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• 2004

This paper reports the RF dispersion and linearity characteristics of unpassivated AlGaN/InGaN/GaN high electron-mobility transistors (HEMTs) grown by molecular beam epitaxy (MBE). The devices with a 0.5 ${\mu}{\textrm}{m}$ gate-length exhibited relatively good DC characteristics with a maximum drain current of 730 mA/mm and a peak g$_{m}$ of 156 mS/mm. Highly linear characteristic was observed by relatively flat DC transconductance (g$_{m}$) and good inter-modulation distortion characteristics, which indicates tight channel carrier confinement of the InGaN channel. Little current collapse in pulse I-V and load-pull measurements was observed at elevated temperatures and a relatively high power density of 1.8 W/mm was obtained at 2 GHz. These results indicate that current collapse related with surface states will not be a power limiting factor for the AlGaN/InGaN HEMTs.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.304.2-304.2
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• 2014

Chalcogenides (Te,Se) and pnictogens(Bi,Sb) materials have been widely investigated as thermoelectric materials. Especially, Bi2Te3 (Bismuth telluride) compound thermoelectric materials in thin film and nanowires are known to have the highest thermoelectric figure of merit ZT at room temperature. Currently, the thermoelectric material research is mostly driven in two directions: (1) enhancing the Seebeck coefficient, electrical conductivity using quantum confinement effects and (2) decreasing thermal conductivity using phonon scattering effect. Herein we demonstrated influence of annealing temperature on structural and thermoelectrical properties of Bismuth-telluride-selenide ternary compound thin film. Te-rich Bismuth-telluride-selenide ternary compound thin film prepared co-deposited by thermal evaporation techniques. After annealing treatment, co-deposited thin film was transformed amorphous phase to Bi2Te3-Bi2Te2Se1 polycrystalline thin film. In the experiment, to investigate the structural and thermoelectric characteristics of Bi2Te3-i2Te2Se1 films, we measured Rutherford Backscattering spectrometry (RBS), X-ray diffraction (XRD), Raman spectroscopy, Scanning eletron microscopy (SEM), Transmission electron microscopy (TEM), Seebeck coefficient measurement and Hall measurement. After annealing treatment, electrical conductivity and Seebeck coefficient was increased by defect states dominated by selenium vacant sites. These charged selenium vacancies behave as electron donors, resulting in carrier concentration was increased. Moreover, Thermal conductivity was significantly decreased because phonon scattering was enhanced through the grain boundary in Bi2Te3-Bi2Te2Se1 polycrystalline compound. As a result, The enhancement of thermoelectric figure-of-merit could be obtained by optimal annealing treatment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.151-151
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• 2008

갈륨-질화물(GaN) 기반의 고속전자이동도 트랜지스터(high electron mobility transistor, HEMT)는 마이크로파 또는 밀리미터파 등과 같은 고주파 대역의 통신시스템에 널리 사용되는 전자소자로 각광받고 있다. GaN HEMT는 AlGaN/GaN 또는 AlGaN/InGaN/GaN 등과 같은 이종접합구조(heterostructure)로부터 발생하는 이차원 전자가스(two-dimensional electron gas, 2DEG) 채널을 이용하여 캐리어 구속효과(carrier confinement) 및 이동도의 향상이 가능하다. 또한 높은 2DEG 채널의 면밀도(sheet concentration) 와 전자의 포화 속도(saturation velocity)를 바탕으로 고출력 동작이 가능하여 차세대 이동통신용 전력 증폭기로 주목받고 있다. 그러나 이론적으로 우수한 특성과 달리, 실제 소자에서는 epi 성장시의 결함이나 전위, 표면 상태에 따른 2DEG 감소 등의 영향으로 이론보다 높은 누설 전류와 낮은 항복 전압 특성을 가진다. 특히, 기존의 GaN HEMT 구조에서는 Drain-Side Gate Edge에서의 전계 집중이 항복 전압 특성에 미치는 영향이 크다. 본 논문에서는 이러한 문제를 해결하기 위해 Trapezoidal Gate구조를 이용하여 Drain 방향의 Gate Edge가 완만히 변하는 구조를 제안하였다. 이를 위해 $ATLAS^{TM}$ 전산모사 프로그램을 이용하여 Trapezoidal Gate 구조를 구현하여 형태에 따른 전류-전압 특성 및 소자의 스위칭 특성 및 Gate 아래 채널층에 형성되는 Electric Field의 분산을 조사하고, 이를 바탕으로 고속 동작 및 높은 항복 전압을 갖는 AlGaN/GaN HEMT의 최적화된 구조를 제안하였다. 새로운 구조의 Gate를 적용한 AlGaN/GaN HEMT는 Gate edge에서의 전계를 분산시켜 피크 값이 감소되는 것을 확인하였다.

• Journal of the Korean Vacuum Society
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• v.17 no.4
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• pp.359-364
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• 2008

We have investigated optical and structural properties of $Al_{0.3}Ga_{0.7}N$/GaN and $Al_{0.3}Ga_{0.7}N/GaN/Al_{0.15}Ga_{0.85}N/GaN$ heterostructures (HSs) grown by metal-organic chemical vapor deposition, by means of Hall measurement, high-resolution X-ray diffraction, and temperature- and excitation power-dependent photoluminescence (PL) spectroscopy. A strong GaN band edge emission and its longitudinal optical phonon replicas were observed for all the samples. At 10 K, a 2DEG-related PL peak located at ${\sim}\;3.445\;eV$ was observed for $Al_{0.3}Ga_{0.7}N$/GaN HS, while two 2DEG peaks at ${\sim}\;3.42$ and ${\sim}\;3.445\;eV$ were observed for $Al_{0.3}Ga_{0.7}N/GaN/Al_{0.15}Ga_{0.85}N/GaN$ HS due to the additional $Al_{0.15}Ga_{0.85}N$ layers. Moreover, the emission intensity of the 2DEG peak was higher in $Al_{0.3}Ga_{0.7}N/GaN/Al_{0.15}Ga_{0.85}N/GaN$ HS than in $Al_{0.3}Ga_{0.7}N$/GaN HS probably due to an effective confinement of the photo-excited holes by the additional $Al_{0.15}Ga_{0.85}N$ layers. The 2DEG-related emission intensity decreased with increasing temperature and disappeared at temperatures above 150 K. To investigate the origin of the new 2DEG peaks, the energy-band structure for multiple AlGaN/GaN HSs were simulated and compared with the experimental data. As a result, the observed high- and low-energy peaks of 2DEG can be attributed to the spatially-separated 2DEG emissions formed at different AlGaN/GaN heterointerfaces.